Zuying Luo
According to our database1,
Zuying Luo
authored at least 31 papers
between 2002 and 2021.
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Bibliography
2021
Int. J. Comput. Commun. Control, 2021
2015
Proceedings of the Biometric Recognition - 10th Chinese Conference, 2015
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015
2013
Accurate architecture-level thermal analysis methods for MPSoC with consideration for leakage power dependence on temperature.
Proceedings of the International Symposium on Quality Electronic Design, 2013
Thermal Analysis with Considering Interactions among Temperature/Power/Heat Conductance and Its Fast Precondition-Solving Algorithm FPSCG.
Proceedings of the 2013 International Conference on Computer-Aided Design and Computer Graphics, 2013
2012
Efficient statistical capacitance extraction of nanometer interconnects considering the on-chip line edge roughness.
Microelectron. Reliab., 2012
Localized relaxation theory of circuits and its applications in electro-thermal analyses.
Sci. China Inf. Sci., 2012
Proceedings of the Thirteenth International Symposium on Quality Electronic Design, 2012
2011
Proceedings of the 12th International Conference on Computer-Aided Design and Computer Graphics, 2011
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011
2009
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
Proceedings of the 11th International Conference on Computer-Aided Design and Computer Graphics, 2009
An task scheduling algorithm of real-time leakage power and temperature optimization for MPSoC.
Proceedings of the 11th International Conference on Computer-Aided Design and Computer Graphics, 2009
2008
Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008
2007
Proceedings of the 10th International Conference on Computer-Aided Design and Computer Graphics, 2007
2006
IEEE Trans. Circuits Syst. II Express Briefs, 2006
Sci. China Ser. F Inf. Sci., 2006
Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30, 2006
2005
Modeling and Analysis of Mesh Tree Hybrid Power/Ground Networks with Multiple Voltage Supply in Time Domain.
J. Comput. Sci. Technol., 2005
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005
2004
Area minimization of power distribution network using efficient nonlinear programming techniques.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004
J. Comput. Sci. Technol., 2004
Simultaneous Wire Sizing and Decoupling Capacitance Budgeting for Robust On-Chip Power Delivery.
Proceedings of the Integrated Circuit and System Design, 2004
Transient Analysis of On-Chip Power Distribution Networks Using Equivalent Circuit Modeling.
Proceedings of the 5th International Symposium on Quality of Electronic Design (ISQED 2004), 2004
A maximum total leakage current estimation method.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
Partial random walk for large linear network analysis.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004
2003
Proceedings of the 12th Asian Test Symposium (ATS 2003), 17-19 November 2003, Xian, China, 2003
2002
The monotonic increasing relationship between average powers of CMOS VLSI circuits with and without delay and its applications.
Sci. China Ser. F Inf. Sci., 2002
Proceedings of the 11th Asian Test Symposium (ATS 2002), 18-20 November 2002, Guam, USA, 2002