Zubaida Binti Yusoff

Orcid: 0000-0003-0564-238X

According to our database1, Zubaida Binti Yusoff authored at least 12 papers between 2015 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Bibliography

2024
Novel Ultra-Compact Wide Stopband Microstrip Lowpass-Bandpass Triplexer for 5G Multi-Service Wireless Networks.
IEEE Access, 2024

2023
A Balanced Symmetrical Branch-Line Microstrip Coupler for 5G Applications.
Symmetry, August, 2023

A Systematic Approach of Generalized Reactance Compensation Technique in Wideband Class-E Power Amplifier for Lower High Frequency (HF) Bands.
IEEE Access, 2023

Design and Optimization of a Compact Microstrip Filtering Coupler With Low Losses and Improved Group Delay for High-Performance RF Communication Systems.
IEEE Access, 2023

A High-Performance Microstrip Triplexer With Compact Size, Flat Channels and Low Losses for 5G Applications.
IEEE Access, 2023

2022
Insertion Loss and Phase Compensation Using a Circular Slot Via-Hole in a Compact 5G Millimeter Wave (mmWave) Butler Matrix at 28 GHz.
Sensors, 2022

Test power and area optimized logic built-in self-test with higher fault coverage for automobile SoCs.
Microelectron. J., 2022

Recent Developments of Butler Matrix From Components Design Evolution to System Integration for 5G Beamforming Applications: A Survey.
IEEE Access, 2022

Design of Wideband Continuous Class-F Power Amplifier Using Low Pass Matching Technique and Harmonic Tuning Network.
IEEE Access, 2022

2021
A Low-Power and Area-Efficient Design of a Weighted Pseudorandom Test-Pattern Generator for a Test-Per-Scan Built-in Self-Test Architecture.
IEEE Access, 2021

2016
Analysis design of area efficient segmentation digital to analog converter for ultra-low power successive approximation analog to digital converter.
Microelectron. J., 2016

2015
Low power 18T pass transistor logic ripple carry adder.
IEICE Electron. Express, 2015


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