Zu-Jia Lo

According to our database, Zu-Jia Lo authored at least 6 papers between 2021 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2024

A Power-Efficient Autonomous Current Adaptation ADC Input Driver.

Zu-Jia Lo, Tzu-Heng Hsu, Hsiu-Min Yang, Xiu-Zhu Li, Wei-Zhi Lai, Ren-Yong Hung, Yun-Jie Huang, Sheng-Yu Peng

IEEE Trans. Circuits Syst. I Regul. Pap., August, 2024

2023

A Transient-Enhanced Autonomous Current Adaptation Buffer Amplifier.

Zu-Jia Lo, Yun-Jie Huang, Ren-Yong Hung, Tzu-Heng Hsu, Hsiu-Min Yang, Xiu-Zhu Li, Yuan-Chuan Wang, Sheng-Yu Peng

IEEE Trans. Circuits Syst. II Express Briefs, October, 2023

A biphasic current-mode stimulator integrated circuit with a novel residual charge compensation mechanism.

Bipasha Nath, Sheng-Yu Peng, Zu-Jia Lo, Yu-Hsuan Pai, Yi-Ting Yeh, Huang-Hsiang Chang, Yi-Ching Lu, Shu-Hui Huang, Fang-Chia Chang

Integr., 2023

An Integrated Circuit of A Cold Start-up Circuit for A Thermoelectric Energy Harvesting System.

Xin-Hao Yu, Po-Wei Lin, Cheng-Yang Hsu, Sandeep Kumar Yadav, Zu-Jia Lo, Sheng-Yu Peng

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

2021

A Reconfigurable Differential-to-Single-Ended Autonomous Current Adaptation Buffer Amplifier Suitable for Biomedical Applications.

Zu-Jia Lo, Yuan-Chuan Wang, Yun-Jie Huang, Ren-Yong Hung, Yi-Heng Wu, Tzu-Yun Wang, Yang-Jing Huang, Hui-Chun Huang, Yu-Cheng Lu, Sheng-Yu Peng, Chia-Yuan Chang, Wen-Sung Lai, Yu-Juei Hsu

IEEE Trans. Biomed. Circuits Syst., 2021

A Floating-Gate-Based Four-Channel Reconfigurable Analog Front-End Integrated Circuit.

Zu-Jia Lo, Bipasha Nath, Yuan-Chuan Wang, Yun-Jie Huang, Hui-Chun Huang, Sheng-Yu Peng

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021