Zongwei Wang
Orcid: 0000-0001-6297-2700Affiliations:
- Peking University, Institute of Microelectronics, Beijing, China (PhD 2018)
According to our database1,
Zongwei Wang
authored at least 25 papers
between 2015 and 2024.
Collaborative distances:
Collaborative distances:
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Bibliography
2024
An RRAM-Based Hierarchical Computing-in-Memory Architecture With Synchronous Parallelism for 3-D Point Cloud Recognition.
IEEE Trans. Circuits Syst. II Express Briefs, October, 2024
CoRR, 2024
Investigation and mitigation of Mott neuronal oscillation fluctuation in spiking neural network.
Sci. China Inf. Sci., 2024
An isolated symmetrical 2T2R cell enabling high precision and high density for RRAM-based in-memory computing.
Sci. China Inf. Sci., 2024
A cascaded timestamp-free event camera image compression method for gesture recognition.
Proceedings of the 33rd IEEE International Symposium on Industrial Electronics, 2024
Proceedings of the IEEE International Reliability Physics Symposium, 2024
2023
Proceedings of the International Joint Conference on Neural Networks, 2023
Proceedings of the IEEE International Conference on Integrated Circuits, 2023
A High-Throughput and Configurable TRNG Based on Dual-Mode Memristor for Stochastic Computing.
Proceedings of the IEEE International Conference on Integrated Circuits, 2023
Proceedings of the 15th IEEE International Conference on ASIC, 2023
2022
PIMulator-NN: An Event-Driven, Cross-Level Simulation Framework for Processing-In-Memory-Based Neural Network Accelerators.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
In Materia Neuron Spiking Plasticity for Sequential Event Processing Based on Dual-Mode Memristor.
Adv. Intell. Syst., 2022
2021
A High Accuracy Multiple-Command Speech Recognition ASIC Based on Configurable One-Dimension Convolutional Neural Network.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
2020
Rotational Pattern Recognition by Spiking Correlated Neural Network Based on Dual-Gated MoS 2 Neuristor.
Adv. Intell. Syst., 2020
MobiLattice: A Depth-wise DCNN Accelerator with Hybrid Digital/Analog Nonvolatile Processing-In-Memory Block.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020
Lattice: An ADC/DAC-less ReRAM-based Processing-In-Memory Architecture for Accelerating Deep Convolution Neural Networks.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020
2019
Investigation of NbO<sub><i>x</i></sub>-based volatile switching device with self-rectifying characteristics.
Sci. China Inf. Sci., 2019
Enhance the Robustness to Time Dependent Variability of ReRAM-Based Neuromorphic Computing Systems with Regularization and 2R Synapse.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
2018
Integration of biocompatible organic resistive memory and photoresistor for wearable image sensing application.
Sci. China Inf. Sci., 2018
Hiearchical Crossbar Design for ReRAM based Write Variation Inhibition on-chip learning.
Proceedings of the Non-Volatile Memory Technology Symposium, 2018
Proceedings of the Non-Volatile Memory Technology Symposium, 2018
Enhancement of HfO2 Based RRAM Performance Through Hexagonal Boron Nitride Interface Layer.
Proceedings of the Non-Volatile Memory Technology Symposium, 2018
2017
A neural network circuit with associative learning and forgetting process based on memristor neuromorphic device.
Proceedings of the 12th IEEE International Conference on ASIC, 2017
2016
Proceedings of the 2016 IEEE International 3D Systems Integration Conference, 2016
2015
Influence of selector-introduced compliance current on HfOx RRAM switching operation.
Proceedings of the 15th Non-Volatile Memory Technology Symposium, 2015