Zongliang Huo
Orcid: 0000-0002-9845-5649
According to our database1,
Zongliang Huo
authored at least 26 papers
between 2015 and 2024.
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Bibliography
2024
IEEE Embed. Syst. Lett., June, 2024
2023
Interleaved LDPC Decoding Scheme Improves 3-D TLC NAND Flash Memory System Performance.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., November, 2023
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., May, 2023
FBEL: Enhanced LLR optimization algorithm based on the VSER prediction by flag bits in the bit-flipping scheme.
IEICE Electron. Express, 2023
2022
A novel adaptive-refresh scheme to reduce refresh with page endurance variance in 3D TLC NAND flash memories.
IEICE Electron. Express, 2022
IEICE Electron. Express, 2022
IEEE Embed. Syst. Lett., 2022
Reduce Refresh Operations on 3-D TLC nand Flash System via Wordline (WL) Interference.
IEEE Embed. Syst. Lett., 2022
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
2021
A Small Ripple and High-Efficiency Wordline Voltage Generator for 3-D nand Flash Memories.
IEEE Trans. Very Large Scale Integr. Syst., 2021
Low Power Program Scheme With Capacitance-Less Charge Recycling for 3D NAND Flash Memory.
IEEE Trans. Circuits Syst. II Express Briefs, 2021
Efficient Data Recovery Technique for 3D TLC NAND Flash Memory based on WL Interference.
Proceedings of the IEEE International Reliability Physics Symposium, 2021
Using Word Line (WL) Interference to Reduce Refresh Operations on 3D NAND Flash System.
Proceedings of the 2021 IEEE International Conference on Integrated Circuits, 2021
LAEPS: LDPC LLR Adaptive Estimation Based on Pattern Set Distribution Variation in 3D Charge Trap NAND Flash Memories.
Proceedings of the 2021 IEEE International Conference on Integrated Circuits, 2021
2020
A Small Ripple Program Voltage Generator Without High-Voltage Regulator for 3D NAND Flash.
IEEE Trans. Circuits Syst. II Express Briefs, 2020
Multi-Coding ECC Algorithm Based on 3D Charge Trap NAND Flash Hot Region Cell Prediction.
IEEE Commun. Lett., 2020
An Improved Dimensional Measurement Method of Staircase Patterns With Higher Precision in 3D NAND.
IEEE Access, 2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
2019
Cycling Induced Trap Generation and Recovery Near the Top Select Gate Transistor in 3D NAND.
Proceedings of the IEEE International Reliability Physics Symposium, 2019
2018
IEICE Electron. Express, 2018
A fast read retry method for 3D NAND flash memories using novel valley search algorithm.
IEICE Electron. Express, 2018
2017
IEICE Electron. Express, 2017
IEICE Electron. Express, 2017
2015
A 1G-cell floating-gate NOR flash memory in 65 nm technology with 100 ns random access time.
Sci. China Inf. Sci., 2015
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015