Ziaul Choudhury
Orcid: 0000-0001-9019-0239
According to our database1,
Ziaul Choudhury
authored at least 9 papers
between 2016 and 2023.
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Timeline
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Book In proceedings Article PhD thesis Dataset OtherLinks
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Bibliography
2023
FlowPix: Accelerating Image Processing Pipelines on an FPGA Overlay using a Domain Specific Compiler.
ACM Trans. Archit. Code Optim., December, 2023
2022
A Unified Programmable Edge Matrix Processor for Deep Neural Networks and Matrix Algebra.
ACM Trans. Embed. Comput. Syst., September, 2022
ACM Trans. Archit. Code Optim., 2022
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022
2020
FPGA Accelerator for Stereo Vision using Semi-Global Matching through Dependency Relaxation.
Proceedings of the 30th International Conference on Field-Programmable Logic and Applications, 2020
Proceedings of the 30th International Conference on Field-Programmable Logic and Applications, 2020
Bitwidth customization in image processing pipelines using interval analysis and SMT solvers.
Proceedings of the CC '20: 29th International Conference on Compiler Construction, 2020
2018
Synthesizing Power and Area Efficient Image Processing Pipelines on FPGAs using Customized Bit-widths.
CoRR, 2018
2016
Proceedings of the 15th International Symposium on Parallel and Distributed Computing, 2016