Ziaul Choudhury

Orcid: 0000-0001-9019-0239

According to our database1, Ziaul Choudhury authored at least 9 papers between 2016 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

2016
2017
2018
2019
2020
2021
2022
2023
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Legend:

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In proceedings 
Article 
PhD thesis 
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Other 

Links

On csauthors.net:

Bibliography

2023
FlowPix: Accelerating Image Processing Pipelines on an FPGA Overlay using a Domain Specific Compiler.
ACM Trans. Archit. Code Optim., December, 2023

2022
A Unified Programmable Edge Matrix Processor for Deep Neural Networks and Matrix Algebra.
ACM Trans. Embed. Comput. Syst., September, 2022

An FPGA Overlay for CNN Inference with Fine-grained Flexible Parallelism.
ACM Trans. Archit. Code Optim., 2022

Accuracy Configurable FPGA Implementation of Harris Corner Detection.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022

2020
FPGA Accelerator for Stereo Vision using Semi-Global Matching through Dependency Relaxation.
Proceedings of the 30th International Conference on Field-Programmable Logic and Applications, 2020

Accelerating Local Laplacian Filters on FPGAs.
Proceedings of the 30th International Conference on Field-Programmable Logic and Applications, 2020

Bitwidth customization in image processing pipelines using interval analysis and SMT solvers.
Proceedings of the CC '20: 29th International Conference on Compiler Construction, 2020

2018
Synthesizing Power and Area Efficient Image Processing Pipelines on FPGAs using Customized Bit-widths.
CoRR, 2018

2016
A Hybrid CPU+GPU Working-Set Dictionary.
Proceedings of the 15th International Symposium on Parallel and Distributed Computing, 2016


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