Ziang Hu

According to our database1, Ziang Hu authored at least 28 papers between 2002 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
LLM-Driven External Knowledge Integration Network for Rumor Detection.
Proceedings of the Advanced Intelligent Computing Technology and Applications, 2024

2023
EPT: A data-driven transformer model for earthquake prediction.
Eng. Appl. Artif. Intell., 2023

2022
PEKIN: Prompt-Based External Knowledge Integration Network for Rumor Detection on Social Media.
Proceedings of the PRICAI 2022: Trends in Artificial Intelligence, 2022

Research on Hand-eye Calibration Method Based on Binocular Camera.
Proceedings of the 8th International Conference on Systems and Informatics, 2022

2018
Analysis of classic algorithms on highly-threaded many-core architectures.
Future Gener. Comput. Syst., 2018

Lite-Service: A Framework to Build and Schedule Telecom Applications in Device, Edge and Cloud.
Proceedings of the 20th IEEE International Conference on High Performance Computing and Communications; 16th IEEE International Conference on Smart City; 4th IEEE International Conference on Data Science and Systems, 2018

2017
SceneMan: Bridging mobile apps with system energy manager via scenario notification.
Proceedings of the 2017 IEEE/ACM International Symposium on Low Power Electronics and Design, 2017

CoRAL: Confined Recovery in Distributed Asynchronous Graph Processing.
Proceedings of the Twenty-Second International Conference on Architectural Support for Programming Languages and Operating Systems, 2017

2015
Task-D: A Task Based Programming Framework for Distributed System.
Proceedings of the 17th IEEE International Conference on High Performance Computing and Communications, 2015

2014
PREDATOR: predictive false sharing detection.
Proceedings of the ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2014

Code Layout Optimization for Defensiveness and Politeness in Shared Cache.
Proceedings of the 43rd International Conference on Parallel Processing, 2014

2010
Efficient compilation of fine-grained SPMD-threaded programs for multicore CPUs.
Proceedings of the CGO 2010, 2010

2007
Toward an Automatic Code Layout Methodology.
Proceedings of the A Practical Programming Model for the Multi-Core Era, 2007

Synchronization state buffer: supporting efficient fine-grain synchronization on many-core architectures.
Proceedings of the 34th International Symposium on Computer Architecture (ISCA 2007), 2007

On the Role of Deterministic Fine-Grain Data Synchronization for Scientific Applications: A Revisit in the Emerging Many-Core Era.
Proceedings of the 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), 2007

Exploring a Multithreaded Methodology to Implement a Network Communication Protocol on the Cyclops-64 Multithreaded Architecture.
Proceedings of the 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), 2007

Optimizing the Fast Fourier Transform on a Multi-core Architecture.
Proceedings of the 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), 2007

2006
Toward a Software Infrastructure for the Cyclops-64 Cellular Architecture.
Proceedings of the 20th Annual International Symposium on High Performance Computing Systems and Applications (HPCS 2006), 2006

Optimization of Dense Matrix Multiplication on IBM Cyclops-64: Challenges and Experiences.
Proceedings of the Euro-Par 2006, Parallel Processing, 12th International Euro-Par Conference, Dresden, Germany, August 28, 2006

2005
Improving power efficiency with compiler-assisted cache replacement.
J. Embed. Comput., 2005

Madd Operation Aware Redundancy Elimination.
Int. J. Softw. Eng. Knowl. Eng., 2005

Sequential Consistency Revisit: The Sufficient Condition and Method to Reason the Consistency Model of a Multiprocessor-on-a-Chip Architecture.
Proceedings of the IASTED International Conference on Parallel and Distributed Computing and Networks, 2005

Performance Modelling and Optimization of Memory Access on Cellular Computer Architecture Cyclops64.
Proceedings of the Network and Parallel Computing, IFIP International Conference, 2005

TiNy Threads: A Thread Virtual Machine for the Cyclops64 Cellular Architecture.
Proceedings of the 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), 2005

Identifying Multiply-Add Operations in Kylin Compiler.
Proceedings of The 2005 International Conference on Embedded Systems and Applications, 2005

2003
Compiler-Assisted Cache Replacement: Problem Formulation and Performance Evaluation.
Proceedings of the Languages and Compilers for Parallel Computing, 2003

Programming Models and System Software for Future High-End Computing Systems: Work-in-Progress.
Proceedings of the 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 2003

2002
Next Generation System Software for Future High-End Computing Systems.
Proceedings of the 16th International Parallel and Distributed Processing Symposium (IPDPS 2002), 2002


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