Zhongyuan Zhao

According to our database, Zhongyuan Zhao authored at least 12 papers between 2015 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

UniSparse: An Intermediate Language for General Sparse Format Customization.

Jie Liu, Zhongyuan Zhao, Zijian Ding, Benjamin Brock, Hongbo Rong, Zhiru Zhang

Proc. ACM Program. Lang., 2024

Scalable, Programmable and Dense: The HammerBlade Open-Source RISC-V Manycore.

Dai Cheol Jung, Max Ruttenberg, Paul Gao, Scott Davidson, Daniel Petrisko, Kangli Li, Aditya K. Kamath, Lin Cheng, Shaolin Xie, Peitian Pan, Zhongyuan Zhao, Zichao Yue, Bandhav Veluri, Sripathi Muralitharan, Adrian Sampson, Andrew Lumsdaine, Zhiru Zhang, Christopher Batten, Mark Oskin, Dustin Richmond, Michael Bedford Taylor

Proceedings of the 51st ACM/IEEE Annual International Symposium on Computer Architecture, 2024

2022

A Tensor Processing Framework for CPU-Manycore Heterogeneous Systems.

Lin Cheng, Peitian Pan, Zhongyuan Zhao, Krithik Ranjan, Jack Weber, Bandhav Veluri, Seyed Borna Ehsani, Max Ruttenberg, Dai Cheol Jung, Preslav Ivanov, Dustin Richmond, Michael B. Taylor, Zhiru Zhang, Christopher Batten

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

2021

Reducing Memory Access Conflicts with Loop Transformation and Data Reuse on Coarse-grained Reconfigurable Architecture.

Yuge Chen, Zhongyuan Zhao, Jianfei Jiang, Guanghui He, Zhigang Mao, Weiguang Sheng

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2020

Towards Higher Performance and Robust Compilation for CGRA Modulo Scheduling.

Zhongyuan Zhao, Weiguang Sheng, Qin Wang, Wenzhi Yin, Pengfei Ye, Jinchao Li, Zhigang Mao

IEEE Trans. Parallel Distributed Syst., 2020

2019

mRNA: Enabling Efficient Mapping Space Exploration for a Reconfiguration Neural Accelerator.

Zhongyuan Zhao, Hyoukjun Kwon, Sachit Kuhar, Weiguang Sheng, Zhigang Mao, Tushar Krishna

Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2019

2018

MBSS: A General Paradigm for Static Schedule for Nested Loops with Dynamic Loop Boundary on CGRAs.

Shuai Xie, Zhongyuan Zhao, Weiguang Sheng, Qin Wang, Zhigang Mao

Proceedings of the 2018 International Conference on ReConFigurable Computing and FPGAs, 2018

Optimizing the data placement and transformation for multi-bank CGRA computing system.

Zhongyuan Zhao, Yantao Liu, Weiguang Sheng, Tushar Krishna, Qin Wang, Zhigang Mao

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017

A static-placement, dynamic-issue framework for CGRA loop accelerator.

Zhongyuan Zhao, Weiguang Sheng, Weifeng He, Zhigang Mao, Zhaoshi Li

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

2016

Enabling in-situ logic-in-memory capability using resistive-RAM crossbar memory.

Naifeng Jing, Taozhong Li, Zhongyuan Zhao, Wei Jin, Yanan Sun, Weifeng He, Zhigang Mao

Proceedings of the 2016 International Conference on Field-Programmable Technology, 2016

2015

Resource-saving compile flow for coarse-grained reconfigurable architectures.

Zhongyuan Zhao, Weiguang Sheng, Naifeng Jing, Weifeng He, Zhigang Mao

Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2015

Parasitic Parameters Impacts Investigation on Soft Error Rate by a Circuit Level Framework.

Weiguang Sheng, Zhongyuan Zhao, Zhigang Mao

Proceedings of the 21st IEEE Pacific Rim International Symposium on Dependable Computing, 2015