Zhong Zhang
Orcid: 0000-0003-2611-9424Affiliations:
- University of Electronic Science and Technology of China, State Key Laboratory of Electronic Thin Films and Integrated Devices, Chengdu, China
According to our database1,
Zhong Zhang
authored at least 28 papers
between 2018 and 2024.
Collaborative distances:
Collaborative distances:
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Bibliography
2024
IEEE Trans. Circuits Syst. II Express Briefs, March, 2024
An Adaptive Common-Mode Cancellation Biopotential Amplifier for Two-Electrode Dynamic ECG Recording.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
2023
Achieving High Core Neuron Density in a Neuromorphic Chip Through Trade-off Among Area, Power Consumption, and Data Access Bandwidth.
IEEE Trans. Biomed. Circuits Syst., December, 2023
A 0.053 mm<sup>2</sup> 10-bit 10-ks/s 40-nW SAR ADC with pseudo single ended switching procedure for bio-related applications.
Microelectron. J., September, 2023
A 3-5 GHz, 108fs-RMS jitter, clock receiver circuit for time-interleaved ADCs with a sampling rate of 4 GS/s.
Microelectron. J., September, 2023
A 20 nW +0.8°C/-0.8°C Inaccuracy (3σ) Leakage-Based CMOS Temperature Sensor With Supply Sensitivity of 0.9°C/V.
IEEE Trans. Circuits Syst. I Regul. Pap., 2023
A programmable analog front-end with independent biasing technique for ECG signal acquisition.
Microelectron. J., 2023
Proceedings of the 15th IEEE International Conference on ASIC, 2023
Proceedings of the 15th IEEE International Conference on ASIC, 2023
A Programmable High-Voltage Pulse Transmitter Circuit for 3-D Miniature Ultrasound Probes.
Proceedings of the 15th IEEE International Conference on ASIC, 2023
2022
A Code-Recombination Algorithm-Based ADC With Feature Extraction for WBSN Applications.
IEEE Trans. Very Large Scale Integr. Syst., 2022
A 12-Bit Two-Step Single-Slope ADC With a Constant Input-Common-Mode Level Resistor Ramp Generator.
IEEE Trans. Very Large Scale Integr. Syst., 2022
A 12bit 250 MS/s 5.43fJ/conversion-step SAR ADC with adaptive asynchronous logic in 28 nm CMOS.
Microelectron. J., 2022
A 13-Bit ENOB Third-Order Noise-Shaping SAR ADC Employing Hybrid Error Control Structure and LMS-Based Foreground Digital Calibration.
IEEE J. Solid State Circuits, 2022
2021
A Second-Order Noise-Shaping SAR ADC Using Two Passive Integrators Separated by the Comparator.
IEEE Trans. Very Large Scale Integr. Syst., 2021
Proceedings of the IEEE Custom Integrated Circuits Conference, 2021
A Second-Order Passive Noise-Shaping SAR ADC Using the LMS-Based Mismatch Calibration.
Proceedings of the 14th IEEE International Conference on ASIC, 2021
2020
IEEE Trans. Circuits Syst. I Regul. Pap., 2020
IEEE Trans. Circuits Syst., 2020
A second-order noise-shaping SAR ADC with error-feedback structure and data weighted averaging.
Microelectron. J., 2020
Microelectron. J., 2020
Biomed. Signal Process. Control., 2020
A 12-Bit Column-Parallel Two-Step Single-Slope ADC With a Foreground Calibration for CMOS Image Sensors.
IEEE Access, 2020
A 10-Bit Fully-Predictive ADC with Code-Recombination Algorithm in Transducing Sensor Node Signals.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
2019
Microelectron. J., 2019
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
Proceedings of the 13th IEEE International Conference on ASIC, 2019
2018
IEEE Access, 2018