Zhiyuan He

According to our database, Zhiyuan He authored at least 9 papers between 2004 and 2010.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2010

Multi-temperature testing for core-based system-on-chip.

Zhiyuan He, Zebo Peng, Petru Eles

Proceedings of the Design, Automation and Test in Europe, 2010

Temperature-Aware SoC Test Scheduling Considering Inter-Chip Process Variation.

Nima Aghaee, Zhiyuan He, Zebo Peng, Petru Eles

Proceedings of the 19th IEEE Asian Test Symposium, 2010

2009

Thermal-Aware Test Scheduling for Core-Based SoC in an Abort-on-First-Fail Test Environment.

Zhiyuan He, Zebo Peng, Petru Eles

Proceedings of the 12th Euromicro Conference on Digital System Design, 2009

2008

Thermal-Aware SoC Test Scheduling with Test Set Partitioning and Interleaving.

Zhiyuan He, Zebo Peng, Petru Eles, Paul M. Rosinger, Bashir M. Al-Hashimi

J. Electron. Test., 2008

Simulation-Driven Thermal-Safe Test Time Minimization for System-on-Chip.

Zhiyuan He, Zebo Peng, Petru Eles

Proceedings of the 17th IEEE Asian Test Symposium, 2008

2007

A heuristic for thermal-safe SoC test scheduling.

Zhiyuan He, Zebo Peng, Petru Eles

Proceedings of the 2007 IEEE International Test Conference, 2007

2006

Power constrained and defect-probability driven SoC test scheduling with test set partitioning.

Zhiyuan He, Zebo Peng, Petru Eles

Proceedings of the Conference on Design, Automation and Test in Europe, 2006

2005

Power-Constrained Hybrid BIST Test Scheduling in an Abort-on-First-Fail Test Environment.

Zhiyuan He, Gert Jervan, Zebo Peng, Petru Eles

Proceedings of the Eighth Euromicro Symposium on Digital Systems Design (DSD 2005), 30 August, 2005

2004

Hybrid BIST Test Scheduling Based on Defect Probabilities.

Zhiyuan He, Gert Jervan, Zebo Peng, Petru Eles

Proceedings of the 13th Asian Test Symposium (ATS 2004), 2004