Zhiyao Xie

Orcid: 0000-0002-4442-592X

According to our database1, Zhiyao Xie authored at least 47 papers between 2018 and 2024.

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Bibliography

2024
Data-Pattern-Based Predictive On-Chip Power Meter in DNN Accelerator.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., December, 2024

FADO: Floorplan-Aware Directive Optimization Based on Synthesis and Analytical Models for High-Level Synthesis Designs on Multi-Die FPGAs.
ACM Trans. Reconfigurable Technol. Syst., September, 2024

Toward Fully Automated Machine Learning for Routability Estimator Development.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., March, 2024

CAMU-Net: Copy-move forgery detection utilizing coordinate attention and multi-scale feature fusion-based up-sampling.
Expert Syst. Appl., March, 2024

FirePower: Towards a Foundation with Generalizable Knowledge for Architecture-Level Power Modeling.
CoRR, 2024

Pointer: An Energy-Efficient ReRAM-based Point Cloud Recognition Accelerator with Inter-layer and Intra-layer Optimizations.
CoRR, 2024

ShortCircuit: AlphaZero-Driven Circuit Design.
CoRR, 2024

The Dawn of AI-Native EDA: Promises and Challenges of Large Circuit Models.
CoRR, 2024

AssertLLM: Generating and Evaluating Hardware Verification Assertions from Design Specifications via Multi-LLMs.
CoRR, 2024

SpecLLM: Exploring Generation and Review of VLSI Design Specification with Large Language Model.
CoRR, 2024

Unleashing Flexibility of ML-based Power Estimators Through Efficient Development Strategies.
Proceedings of the 29th ACM/IEEE International Symposium on Low Power Electronics and Design, 2024

Annotating Slack Directly on Your Verilog: Fine-Grained RTL Timing Evaluation for Early Optimization.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

Accel-NASBench: Sustainable Benchmarking for Accelerator-Aware NAS.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

APPLE: An Explainer of ML Predictions on Circuit Layout at the Circuit-Element Level.
Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024

RTLLM: An Open-Source Benchmark for Design RTL Generation with Large Language Model.
Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024

2023
SPA-Net: A Deep Learning Approach Enhanced Using a Span-Partial Structure and Attention Mechanism for Image Copy-Move Forgery Detection.
Sensors, July, 2023

The Dark Side: Security and Reliability Concerns in Machine Learning for EDA.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., April, 2023

RTLCoder: Outperforming GPT-3.5 in Design RTL Generation with Our Open-Source Dataset and Lightweight Solution.
CoRR, 2023

EDALearn: A Comprehensive RTL-to-Signoff EDA Benchmark for Democratized and Reproducible ML for EDA Research.
CoRR, 2023

Security and Reliability Challenges in Machine Learning for EDA: Latest Advances.
Proceedings of the 24th International Symposium on Quality Electronic Design, 2023

Efficient Runtime Power Modeling with On-Chip Power Meters.
Proceedings of the 2023 International Symposium on Physical Design, 2023

PANDA: Architecture-Level Power Evaluation by Unifying Analytical and Machine Learning Solutions.
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

MasterRTL: A Pre-Synthesis PPA Estimation Framework for Any RTL Design.
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

RA-Net: A Deep Learning Approach Based on Residual Structure and Attention Mechanism for Image Copy-Move Forgery Detection.
Proceedings of the Artificial Neural Networks and Machine Learning, 2023

A Noise Convolution Network for Tampering Detection.
Proceedings of the Artificial Neural Networks and Machine Learning, 2023

FADO: Floorplan-Aware Directive Optimization for High-Level Synthesis Designs on Multi-Die FPGAs.
Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2023

Deep Subspace K-Means Clustering for Syringe Defect Detection Without Defective Samples.
Proceedings of the Design Studies and Intelligence Engineering, 2023

PROPHET: Predictive On-Chip Power Meter in Hardware Accelerator for DNN.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

PertNAS: Architectural Perturbations for Memory-Efficient Neural Architecture Search.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

Fully Automated Machine Learning Model Development for Analog Placement Quality Prediction.
Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023

Rethink before Releasing Your Model: ML Model Extraction Attack in EDA.
Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023

2022
Preplacement Net Length and Timing Estimation by Customized Graph Neural Network.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Intelligent Circuit Design and Implementation with Machine Learning.
CoRR, 2022

The Dark Side: Security Concerns in Machine Learning for EDA.
CoRR, 2022

DEEP: Developing Extremely Efficient Runtime On-Chip Power Meters.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

Robustify ML-Based Lithography Hotspot Detectors.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

Towards collaborative intelligence: routability estimation based on decentralized private data.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

2021
APOLLO: An Automated Power Modeling Framework for Runtime Power Introspection in High-Volume Commercial Microprocessors.
Proceedings of the MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021

Automatic Routability Predictor Development Using Neural Architecture Search.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

Net2: A Graph Attention Network Method Customized for Pre-Placement Net Length Estimation.
Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

2020
Fast IR Drop Estimation with Machine Learning.
CoRR, 2020

Fast IR Drop Estimation with Machine Learning : Invited Paper.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

Routing-Free Crosstalk Prediction.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

PowerNet: Transferable Dynamic IR Drop Estimation via Maximum Convolutional Neural Network.
Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

FIST: A Feature-Importance Sampling and Tree-Based Method for Automatic Design Flow Parameter Tuning.
Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

2019
Routability-Driven Macro Placement with Embedded CNN-Based Prediction Model.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

2018
RouteNet: routability prediction for mixed-size designs using convolutional neural network.
Proceedings of the International Conference on Computer-Aided Design, 2018


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