Zhitang Song

Orcid: 0000-0001-7859-9429

According to our database1, Zhitang Song authored at least 57 papers between 2007 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
A Low-Cost Quadruple-Node-Upsets Resilient Latch Design.
IEEE Trans. Very Large Scale Integr. Syst., October, 2024

A Power-On-Reset Circuit With Accurate Trigger-Point Voltage and Ultralow Typical Quiescent Current for Emerging Nonvolatile Memory.
IEEE Trans. Very Large Scale Integr. Syst., August, 2024

A Subthreshold Adaptive-Reference Leakage- Compensation Sensing Scheme for 3D PCM With Enhanced Sensing Margin and Endurance.
IEEE Trans. Circuits Syst. I Regul. Pap., August, 2024

High PSR external capacitor-less LDO with adaptive supply-ripple cancellation technique.
Int. J. Circuit Theory Appl., August, 2024

Auto-Configuration Write Scheme With Enhanced Reliability for 3-D Cross-Point PCM.
IEEE Trans. Circuits Syst. II Express Briefs, February, 2024

Reversible and Irreversible Polarization Degradation of Hf0.5Zr0.5O2 Capacitors with Coherent Structural Transition at Elevated Temperatures.
Proceedings of the IEEE International Reliability Physics Symposium, 2024

2023
A high PSR and high-precision current-mode bandgap reference with g<sub>m</sub> boost self-regulated structure.
Microelectron. J., December, 2023

In-memory computing based on phase change memory for high energy efficiency.
Sci. China Inf. Sci., October, 2023

Temporal-Based Action Clustering for Motion Tendencies.
IEICE Trans. Inf. Syst., August, 2023

A Self-Organizing Multi-Layer Agent Computing System for Behavioral Clustering Recognition.
Sensors, 2023

A novel constant-g<sub>m</sub> rail-to-rail input stage for operational amplifiers.
IEICE Electron. Express, 2023

Online Sequence Clustering Algorithm for Video Trajectory Analysis.
CoRR, 2023

A 1S1R Model with the Monte Carlo Function for Subthreshold Sensing Operation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

2022
Ultrathin HfO<sub>2</sub>/Al<sub>2</sub>O<sub>3</sub> bilayer based reliable 1T1R RRAM electronic synapses with low power consumption for neuromorphic computing.
Neuromorph. Comput. Eng., December, 2022

2022 roadmap on neuromorphic devices and applications research in China.
Neuromorph. Comput. Eng., December, 2022

Post-silicon nano-electronic device and its application in brain-inspired chips.
Frontiers Neurorobotics, September, 2022

Silicon Modeling of Spiking Neurons With Diverse Dynamic Behaviors.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

A Fast-Transient-Response NMOS LDO with Wide Load-Capacitance Range for Cross-Point Memory.
Sensors, 2022

A novel NVM memory file system for edge intelligence.
IEICE Electron. Express, 2022

Memory-like Adaptive Modeling Multi-Agent Learning System.
CoRR, 2022

Atomic visualization of the emergence of orthorhombic phase in Hf0.5Zr0.5O2 ferroelectric film with in-situ rapid thermal annealing.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

Compact Modeling of Phase Change Memory with Parameter Extractions.
Proceedings of the 52nd IEEE European Solid-State Device Research Conference, 2022

2021
An Ultra-Low Quiescent Current Resistor-Less Power on Reset Circuit.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

2020
BIST-Based Fault Diagnosis for PCM With Enhanced Test Scheme and Fault-Free Region Finding Algorithm.
IEEE Trans. Very Large Scale Integr. Syst., 2020

A self-start circuit with asymmetric inductors reconfigurable technology for dual-output boost converter for energy harvesting.
IEICE Electron. Express, 2020

2V/3 Bias Scheme with Enhanced Dynamic Read Performances for 3-D Cross Point PCM.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019
Near-threshold SIDO DC-DC converter with a high-precision ZCD for phase change memory chip.
IEICE Electron. Express, 2019

Subsystem under 3D-Storage Class Memory on a chip.
Comput. Electr. Eng., 2019

2018
A Changing-Reference Parasitic-Matching Sensing Circuit for 3-D Vertical RRAM.
IEEE Trans. Very Large Scale Integr. Syst., 2018

A Single-Reference Parasitic-Matching Sensing Circuit for 3-D Cross Point PCM.
IEEE Trans. Circuits Syst. II Express Briefs, 2018

A novel non-volatile memory storage system for I/O-intensive applications.
Frontiers Inf. Technol. Electron. Eng., 2018

Design and security evaluation of PCM-based rPUF using cyclic refreshing strategy.
IEICE Electron. Express, 2018

From octahedral structure motif to sub-nanosecond phase transitions in phase change materials for data storage.
Sci. China Inf. Sci., 2018

2017
Capacitor-less LDR based on flipped voltage follower with dual-feedback loops.
IEICE Electron. Express, 2017

Erratum: CAM-based retention-aware DRAM (CRA-DRAM) for refresh power reduction [IEICE Electronics Express Vol. 14 (2017) No. 10 pp. 20170053].
IEICE Electron. Express, 2017

CAM-based retention-aware DRAM (CRA-DRAM) for refresh power reduction.
IEICE Electron. Express, 2017

Enhanced 3 × VDD-tolerant ESD clamp circuit with stacked configuration.
IEICE Electron. Express, 2017

A novel high performance 3×VDD-tolerant ESD detection circuit in advanced CMOS process.
IEICE Electron. Express, 2017

Enhanced read performance for phase change memory using a reference column.
IEICE Electron. Express, 2017

Logic area reduction using the deep trench isolation technique based on 40 nm embedded PCM process.
IEICE Electron. Express, 2017

Multi-core architecture with asynchronous clocks to prevent power analysis attacks.
IEICE Electron. Express, 2017

2016
A 40-nm 16-Mb Contact-Programming Mask ROM Using Dual Trench Isolation Diode Bitcell.
IEEE Trans. Very Large Scale Integr. Syst., 2016

Design and implementation of a random access file system for NVRAM.
IEICE Electron. Express, 2016

An FPGA enhanced extensible and parallel query storage system for emerging NVRAM.
IEICE Electron. Express, 2016

A snake addressing scheme for phase change memory testing.
Sci. China Inf. Sci., 2016

2015
Methods to speed up read operation in a 64 Mbit phase change memory chip.
IEICE Electron. Express, 2015

PCRAM-aware cluster allocation algorithm for hybrid main memory hierarchy.
IEICE Electron. Express, 2015

A smart primary side current sensing strategy for single stage isolated PFC controller.
IEICE Electron. Express, 2015

A three-dimensional numerical simulator of phase-change memory by random nucleation and growth approach.
Proceedings of the 15th Non-Volatile Memory Technology Symposium, 2015

Understanding the crystallization mechanism of Ge-Te-Ti phase change material.
Proceedings of the 15th Non-Volatile Memory Technology Symposium, 2015

Three-dimensional ovonic threshold switching model with combination of in-band and trap-to-band hopping mechanism for chalcogenide-based phase-change memory.
Proceedings of the 15th Non-Volatile Memory Technology Symposium, 2015

2014
Flexible block management with data migration wear-leveling algorithm for phase change memory.
IEICE Electron. Express, 2014

A smart method of optimizing the read/write current on PCM array.
IEICE Electron. Express, 2014

A novel auxiliary-free zero inductor current detection scheme for step down non-isolated LED driver.
IEICE Electron. Express, 2014

Optimization of periphery circuits in a 1K-bit PCRAM chip for highly reliable write and read operations.
IEICE Electron. Express, 2014

2009
Memory characteristics of double-layer metal and semiconductor heterogeneous nanocrystals embedded in SiO<sub>2</sub>.
Proceedings of the 4th IEEE International Conference on Nano/Micro Engineered and Molecular Systems, 2009

2007
Preparation of one-dimensional photonic crystal with variable period by using ultra-high vacuum electron beam evaporation.
Microelectron. J., 2007


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