Zhipei Chi

According to our database, Zhipei Chi authored at least 10 papers between 1999 and 2004.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2004

On the better protection of short-frame turbo codes.

Zhipei Chi, Zhongfeng Wang, Keshab K. Parhi

IEEE Trans. Commun., 2004

On The Performance/Complexity Tradeoff in Block Turbo Decoder Design.

Zhipei Chi, Leilei Song, Keshab K. Parhi

IEEE Trans. Commun., 2004

2002

Area-efficient high-speed decoding schemes for turbo decoders.

Zhongfeng Wang, Zhipei Chi, Keshab K. Parhi

IEEE Trans. Very Large Scale Integr. Syst., 2002

High speed VLSI architecture design for block turbo decoder.

Zhipei Chi, Keshab K. Parhi

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

High speed algorithm and VLSI architecture design for decoding BCH product codes.

Zhipei Chi, Keshab K. Parhi

Proceedings of the IEEE International Conference on Acoustics, 2002

2001

A study on the performance, complexity tradeoffs of block turbo decoder design.

Zhipei Chi, Leilei Song, Keshab K. Parhi

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

Area-efficient high speed decoding schemes for turbo/MAP decoders.

Zhongfeng Wang, Zhipei Chi, Keshab K. Parhi

Proceedings of the IEEE International Conference on Acoustics, 2001

A study on the performance, power consumption tradeoffs of short frame turbo decoder design.

Zhipei Chi, Zhongfeng Wang, Keshab K. Parhi

Proceedings of the IEEE International Conference on Acoustics, 2001

2000

High throughput low energy FEC/ARQ technique for short frame turbo codes.

Zhipei Chi, Zhongfeng Wang, Keshab K. Parhi

Proceedings of the IEEE International Conference on Acoustics, 2000

1999

Pipelined QR decomposition based multi-channel least square lattice adaptive filter architectures.

Zhipei Chi, Jun Ma, Keshab K. Parhi

Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999