Zhikuang Cai
Orcid: 0000-0002-0264-3849
According to our database1,
Zhikuang Cai
authored at least 30 papers
between 2009 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2024
A 16-MHz Crystal Oscillator With 17.5- μ s Start-Up Time Under 10<sup>4</sup>-ppm- Δ F Injection Using Automatic Phase-Error Correction.
IEEE J. Solid State Circuits, November, 2024
IEEE Trans. Circuits Syst. II Express Briefs, February, 2024
IEICE Electron. Express, 2024
2023
A 16MHz X0 with 17.5μs Startup Time Under 10<sup>4</sup>ppm-ΔF Injection Using Automatic Phase-Error Correction Technique.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023
2021
IEEE Trans. Circuits Syst. II Express Briefs, 2021
A 0.6V high-swing gate-switching charge pump for PLL with current self-matching technique in 28nm CMOS.
IEICE Electron. Express, 2021
Proceedings of the IEEE International Test Conference in Asia, 2021
2020
Microelectron. J., 2020
A low-power 2.4-GHz receiver front-end with a complementary series feedback LNA and a current-reused passive down-converter based on gm-boosted TIA for WSN applications.
IEICE Electron. Express, 2020
Proceedings of the 29th IEEE Asian Test Symposium, 2020
2019
A 2.4 GHz 2.2 mW current reusing passive mixer with gm-boosted common-gate TIA in 180 nm CMOS.
IEICE Electron. Express, 2019
Proceedings of the IEEE International Test Conference in Asia, 2019
Design of Low-Cost Ground Penetrating Radar Receiving Circuit Based on Equivalent Sampling.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
2018
IEICE Electron. Express, 2018
IEICE Electron. Express, 2018
IEICE Electron. Express, 2018
IEICE Electron. Express, 2018
A 0.6 V temperature-stable CMOS voltage reference circuit with sub-threshold voltage compensation technique.
IEICE Electron. Express, 2018
2017
A 2.4-GHz all-digital phase-locked loop with a pipeline-ΔΣ time-to-digital converter.
IEICE Electron. Express, 2017
IEICE Electron. Express, 2017
IEICE Electron. Express, 2017
A harmonic-free cell-based all-digital delay-locked loop for die-to-die clock synchronization of 3-D IC.
Proceedings of the 12th IEEE International Conference on ASIC, 2017
2015
IEICE Electron. Express, 2015
IEICE Electron. Express, 2015
2014
IEICE Electron. Express, 2014
2013
IEICE Electron. Express, 2013
IEICE Electron. Express, 2013
2012
An optimized QFP structure for use in radio frequency multi-chip module applications.
IEICE Electron. Express, 2012
2009
A Harmonic-Free All Digital Delay-Locked Loop Using an Improved Fast-Locking Successive Approximation Register-Controlled Scheme.
IEICE Trans. Electron., 2009