Zhijun Huang

Orcid: 0000-0002-3393-1915

According to our database1, Zhijun Huang authored at least 14 papers between 1999 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
Revisiting Log Parsing: The Present, the Future, and the Uncertainties.
IEEE Trans. Reliab., September, 2024

ISTransbase: an online database for inhibitor and substrate of drug transporters.
Database J. Biol. Databases Curation, January, 2024

2023
Evaluation and Applicability Analysis of GPM Satellite Precipitation over Mainland China.
Remote. Sens., 2023

Design and Development of Mobile Terminal Application Based on Android.
Informatica (Slovenia), 2023

2018
In silico-in vitro discovery of untargeted kinase-inhibitor interactions from kinase-targeted therapies: A case study on the cancer MAPK signaling pathway.
Comput. Biol. Chem., 2018

2014
DevMouse, the mouse developmental methylome database and analysis tools.
Database J. Biol. Databases Curation, 2014

2011
Improved FP-Growth Algorithm for Freeway Surveillance Network Intrusion Detection System.
Proceedings of the Second International Conference on Digital Manufacturing and Automation, 2011

2009
A Kind of.
Proceedings of the 2009 International Asia Conference on Informatics in Control, 2009

2005
High-Performance Low-Power Left-to-Right Array Multiplier Design.
IEEE Trans. Computers, 2005

2003
Performance-driven mapping for CPLD architectures.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003

High-Performance Left-to-Right Array Multiplier Design.
Proceedings of the 16th IEEE Symposium on Computer Arithmetic (Arith-16 2003), 2003

2002
Two-dimensional signal gating for low-power array multiplier design.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

2001
FPGA Implementation of Pipelined On-Line Scheme for 3-D Vector Normalization.
Proceedings of the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2001

1999
An Analytical Delay Model for SRAM-Based FPGA Interconnections.
Proceedings of the 1999 Conference on Asia South Pacific Design Automation, 1999


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