Zhiheng Cao

According to our database, Zhiheng Cao authored at least 9 papers between 2005 and 2009.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2009

A 32 mW 1.25 GS/s 6b 2b/Step SAR ADC in 0.13 µm CMOS.

Zhiheng Cao, Shouli Yan, Yunchu Li

IEEE J. Solid State Circuits, 2009

2008

A 2.7-mW 2-MHz Continuous-Time ΣΔ Modulator With a Hybrid Active-Passive Loop Filter.

Tongyu Song, Zhiheng Cao, Shouli Yan

IEEE J. Solid State Circuits, 2008

A 0.4 ps-RMS-Jitter 1-3 GHz Ring-Oscillator PLL Using Phase-Noise Preamplification.

Zhiheng Cao, Yunchu Li, Shouli Yan

IEEE J. Solid State Circuits, 2008

A 32mW 1.25GS/s 6b 2b/step SAR ADC in 0.13μm CMOS.

Zhiheng Cao, Shouli Yan, Yunchu Li

Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

A 52mW 10b 210MS/s two-step ADC for digital-IF receivers in 0.13μm CMOS.

Zhiheng Cao, Shouli Yan

Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

2007

A 14 mW 2.5 MS/s 14 bit ΣΔ Modulator Using Split-Path Pseudo-Differential Amplifiers.

Zhiheng Cao, Tongyu Song, Shouli Yan

IEEE J. Solid State Circuits, 2007

2006

A 2.7mW 2MHz Continuous-Time ΣΔ Modulator with a Hybrid Active-Passive Loop Filter.

Tongyu Song, Zhiheng Cao, Shouli Yan

Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

A 14mW 2.5MS/s 14bit Sigma-Delta Modulator Using Pseudo-Differential Split-Path Cascode Amplifiers.

Zhiheng Cao, Tongyu Song, Shouli Yan

Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

2005

A digital background calibration method for mash Σ-Δ modulators by using coefficient estimation.

Zhiheng Cao, Shouli Yan

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005