Zhichuan Guo

According to our database, Zhichuan Guo authored at least 11 papers between 2012 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2024

An Implementation of Reconfigurable Match Table for FPGA-Based Programmable Switches.

Xiaoyong Song, Zhichuan Guo

IEEE Trans. Very Large Scale Integr. Syst., November, 2024

Fast Update Algorithm With Reorder Mechanism for SRAM-Based Longest Prefix Matching on FPGA.

Xiaoyong Song, Zhichuan Guo

IEEE Trans. Circuits Syst. II Express Briefs, January, 2024

High-Throughput Exact Matching Implementation on FPGA with Shared Rule Tables Among Parallel Pipelines.

Xiaoyong Song, Zhichuan Guo, Xinshuo Wang, Mangu Song

IEICE Trans. Commun., 2024

2023

High Performance Network Virtualization Architecture on FPGA SmartNIC.

Ke Wang, Yiwei Chang, Zhichuan Guo

IEICE Trans. Commun., June, 2023

2022

FGLB: A fine-grained hardware intra-server load balancer based on 100 G FPGA SmartNIC.

Xiaoying Huang, Zhichuan Guo, Mangu Song

Int. J. Netw. Manag., 2022

2021

A Multifunctional Full-Packet Capture and Network Measurement System Supporting Nanosecond Timestamp and Real-Time Analysis.

Luchao Han, Zhichuan Guo, Xiaoying Huang, Xuewen Zeng

IEEE Trans. Instrum. Meas., 2021

Accelerating the SM3 hash algorithm with CPU-FPGA Co-Designed architecture.

Xiaoying Huang, Zhichuan Guo, Mangu Song, Xuewen Zeng

IET Comput. Digit. Tech., 2021

2020

Malware Traffic Classification Based on Recurrence Quantification Analysis.

Zheng-Zhi Tang, Xuewen Zeng, Zhichuan Guo, Mangu Song

Int. J. Netw. Secur., 2020

High-Performance Implementation of Dynamically Configurable Load Balancing Engine on FPGA.

Jun Zhao, Zhichuan Guo, Xuewen Zeng, Mangu Song

IEEE Commun. Mag., 2020

2019

High Throughput Implementation of SMS4 on FPGA.

Jun Zhao, Zhichuan Guo, Xuewen Zeng

IEEE Access, 2019

2012

Efficient information hiding in H.264/AVC video coding.

Ke Liao, Shiguo Lian, Zhichuan Guo, Jinlin Wang

Telecommun. Syst., 2012