Zhenman Fang

Jahanvi Narendra Agrawal

ACM Trans. Reconfigurable Technol. Syst., September, 2024

PASTA: Programming and Automation Support for Scalable Task-Parallel HLS Programs on Modern Multi-Die FPGAs.

[BibT_eX]

[DOI]

Moazin Khatti

Xingyu Tian

Ahmad Sedigh Baroughi

ACM Trans. Reconfigurable Technol. Syst., September, 2024

HyBNN: Quantifying and Optimizing Hardware Efficiency of Binary Neural Networks.

[BibT_eX]

[DOI]

ACM Trans. Reconfigurable Technol. Syst., June, 2024

Fast and High-Performance Learned Image Compression With Improved Checkerboard Context Model, Deformable Residual Module, and Knowledge Distillation.

[BibT_eX]

[DOI]

IEEE Trans. Image Process., 2024

HiTC: High-Performance Triangle Counting on HBM-Equipped FPGAs Using HLS.

[BibT_eX]

[DOI]

Proceedings of the IEEE Pacific Rim Conference on Communications, 2024

31st Reconfigurable Architectures Workshop (RAW 2024).

[BibT_eX]

[DOI]

Jürgen Becker

Ramachandran Vaidyanathan

Viktor K. Prasanna

Marco D. Santambrogio

Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2024

Quasar-ViT: Hardware-Oriented Quantization-Aware Architecture Search for Vision Transformers.

[BibT_eX]

[DOI]

Proceedings of the 38th ACM International Conference on Supercomputing, 2024

Efficient Learned Image Compression with Selective Kernel Residual Module and Channel-Wise Causal Context Model.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Acoustics, 2024

SDA: Low-Bit Stable Diffusion Acceleration on Edge FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 34th International Conference on Field-Programmable Logic and Applications, 2024

SA4: A Comprehensive Analysis and Optimization of Systolic Array Architecture for 4-bit Convolutions.

[BibT_eX]

[DOI]

Proceedings of the 34th International Conference on Field-Programmable Logic and Applications, 2024

FORC: A High-Throughput Streaming FPGA Accelerator for Optimized Row Columnar File Decoders in Big Data Engines.

[BibT_eX]

[DOI]

Proceedings of the 34th International Conference on Field-Programmable Logic and Applications, 2024

SERI: High-Throughput Streaming Acceleration of Electron Repulsion Integral Computation in Quantum Chemistry using HBM-based FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 34th International Conference on Field-Programmable Logic and Applications, 2024

BitBlender: Scalable Bloom Filter Acceleration on FPGAs with Dynamic Scheduling.

[BibT_eX]

[DOI]

Kenneth Liu

Proceedings of the 34th International Conference on Field-Programmable Logic and Applications, 2024

E4SA: An Ultra-Efficient Systolic Array Architecture for 4-Bit Convolutional Neural Networks.

[BibT_eX]

[DOI]

Proceedings of the 2024 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2024

HiSpMV: Hybrid Row Distribution and Vector Buffering for Imbalanced SpMV Acceleration on FPGAs.

[BibT_eX]

[DOI]

Manoj B. Rajashekar

Xingyu Tian

Proceedings of the 2024 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2024

WeConvene: Learned Image Compression with Wavelet-Domain Convolution and Entropy Model.

[BibT_eX]

[DOI]

Proceedings of the Computer Vision - ECCV 2024, 2024

Learned Image Compression with Dual-Branch Encoder and Conditional Information Coding.

[BibT_eX]

[DOI]

Proceedings of the Data Compression Conference, 2024

2023

CHIP-KNNv2: A Configurable and High-Performance K-Nearest Neighbors Accelerator on HBM-based FPGAs.

[BibT_eX]

[DOI]

ACM Trans. Reconfigurable Technol. Syst., December, 2023

TAPA: A Scalable Task-parallel Dataflow Programming Framework for Modern FPGAs with Co-optimization of HLS and Physical Design.

[BibT_eX]

[DOI]

ACM Trans. Reconfigurable Technol. Syst., December, 2023

SASA: A Scalable and Automatic Stencil Acceleration Framework for Optimized Hybrid Spatial and Temporal Parallelism on HBM-based FPGAs.

[BibT_eX]

[DOI]

ACM Trans. Reconfigurable Technol. Syst., June, 2023

SuperYOLO: Super Resolution Assisted Object Detection in Multimodal Remote Sensing Imagery.

[BibT_eX]

[DOI]

IEEE Trans. Geosci. Remote. Sens., 2023

TopSort: A High-Performance Two-Phase Sorting Accelerator Optimized on HBM-Based FPGAs.

[BibT_eX]

[DOI]

Weikang Qiao

Licheng Guo

IEEE Trans. Emerg. Top. Comput., 2023

A Cycle-Accurate Soft Error Vulnerability Analysis Framework for FPGA-based Designs.

[BibT_eX]

[DOI]

CoRR, 2023

HeatViT: Hardware-Efficient Adaptive Token Pruning for Vision Transformers.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2023

Journal Track Paper ICFPT 2023 : HyBNN: Quantifying and Optimizing Hardware Efficiency of Binary Neural Networks.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Field Programmable Technology, 2023

SQL2FPGA: Automatic Acceleration of SQL Query Processing on Modern CPU-FPGA Platforms.

[BibT_eX]

[DOI]

Proceedings of the 31st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2023

PASTA: Programming and Automation Support for Scalable Task-Parallel HLS Programs on Modern Multi-Die FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 31st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2023

ESRU: Extremely Low-Bit and Hardware-Efficient Stochastic Rounding Unit Design for Low-Bit DNN Training.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

Caffeine: Towards Uniformed Representation and Acceleration for Deep Convolutional Neural Networks.

[BibT_eX]

[DOI]

Proceedings of the ACM Turing Award Celebration Conference - China 2023, 2023

2022

SyncNN: Evaluating and Accelerating Spiking Neural Networks on FPGAs.

[BibT_eX]

[DOI]

Sathish Panchapakesan

Jian Li

ACM Trans. Reconfigurable Technol. Syst., 2022

Quick-Div: Rethinking Integer Divider Design for FPGA-based Soft-processors.

[BibT_eX]

[DOI]

ACM Trans. Reconfigurable Technol. Syst., 2022

Demystifying the Soft and Hardened Memory Systems of Modern FPGAs for Software Programmers through Microbenchmarking.

[BibT_eX]

[DOI]

Lesley Shannon

ACM Trans. Reconfigurable Technol. Syst., 2022

Introduction to the Special Section on High-level Synthesis for FPGA: Next-generation Technologies and Applications.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 2022

Algorithm/Hardware Codesign for Real-Time On-Satellite CNN-Based Ship Detection in SAR Imagery.

[BibT_eX]

[DOI]

IEEE Trans. Geosci. Remote. Sens., 2022

Stealthy Attack on Algorithmic-Protected DNNs via Smart Bit Flipping.

[BibT_eX]

[DOI]

Proceedings of the 23rd International Symposium on Quality Electronic Design, 2022

Auto-ViT-Acc: An FPGA-Aware Automatic Acceleration Framework for Vision Transformer with Mixed-Scheme Quantization.

[BibT_eX]

[DOI]

Proceedings of the 32nd International Conference on Field-Programmable Logic and Applications, 2022

FILM-QNN: Efficient FPGA Acceleration of Deep Neural Networks with Intra-Layer, Mixed-Precision Quantization.

[BibT_eX]

[DOI]

Proceedings of the FPGA '22: The 2022 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Virtual Event, USA, 27 February 2022, 2022

You Already Have It: A Generator-Free Low-Precision DNN Training Framework Using Stochastic Rounding.

[BibT_eX]

[DOI]

Proceedings of the Computer Vision - ECCV 2022, 2022

Blind Data Adversarial Bit-flip Attack against Deep Neural Networks.

[BibT_eX]

[DOI]

Proceedings of the 25th Euromicro Conference on Digital System Design, 2022

A Majority-based Approximate Adder for FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 25th Euromicro Conference on Digital System Design, 2022

FitAct: Error Resilient Deep Neural Networks via Fine-Grained Post-Trainable Activation Functions.

[BibT_eX]

[DOI]

Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

FPGA-aware automatic acceleration framework for vision transformer with mixed-scheme quantization: late breaking results.

[BibT_eX]

[DOI]

Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

Hardware-efficient stochastic rounding unit design for DNN training: late breaking results.

[BibT_eX]

[DOI]

Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

2021

Programming and Synthesis for Software-defined FPGA Acceleration: Status and Future Prospects.

[BibT_eX]

[DOI]

ACM Trans. Reconfigurable Technol. Syst., 2021

SeaPlace: Process Variation Aware Placement for Reliable Combinational Circuits against SETs and METs.

[BibT_eX]

[DOI]

CoRR, 2021

BDFA: A Blind Data Adversarial Bit-flip Attack on Deep Neural Networks.

[BibT_eX]

[DOI]

CoRR, 2021

MAPLE: A Machine Learning based Aging-Aware FPGA Architecture Exploration Framework.

[BibT_eX]

[DOI]

Proceedings of the 31st International Conference on Field-Programmable Logic and Applications, 2021

Demystifying the Memory System of Modern Datacenter FPGAs for Software Programmers through Microbenchmarking.

[BibT_eX]

[DOI]

Proceedings of the FPGA '21: The 2021 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, Virtual Event, USA, February 28, 2021

LEAP: A Deep Learning based Aging-Aware Architecture Exploration Framework for FPGAs.

[BibT_eX]

[DOI]

Proceedings of the FPGA '21: The 2021 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, Virtual Event, USA, February 28, 2021

2020

FPGA-based Near Data Processing Platform Selection Using Fast Performance Modeling (WiP Paper).

[BibT_eX]

[DOI]

Nazanin Farahpour

Glenn Reinman

Proceedings of the 21st ACM SIGPLAN/SIGBED International Conference on Languages, 2020

Reconfigurable Accelerator Compute Hierarchy: A Case Study using Content-Based Image Retrieval.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Workload Characterization, 2020

CHIP-KNN: A Configurable and High-Performance K-Nearest Neighbors Accelerator on Cloud FPGAs.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Field-Programmable Technology, 2020

Aadam: A Fast, Accurate, and Versatile Aging-Aware Cell Library Delay Model using Feed-Forward Neural Network.

[BibT_eX]

[DOI]

Seyed Milad Ebrahimipour

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

EASpiNN: Effective Automated Spiking Neural Network Evaluation on FPGA.

[BibT_eX]

[DOI]

Sathish Panchapakesan

Nitin Chandrachoodan

Proceedings of the 28th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2020

Algorithm-Hardware Co-design for BQSR Acceleration in Genome Analysis ToolKit.

[BibT_eX]

[DOI]

Proceedings of the 28th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2020

2019

In-Depth Analysis on Microarchitectures of Modern Heterogeneous CPU-FPGA Platforms.

[BibT_eX]

[DOI]

ACM Trans. Reconfigurable Technol. Syst., 2019

Caffeine: Toward Uniformed Representation and Acceleration for Deep Convolutional Neural Networks.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

Customizable Computing - From Single Chip to Datacenters.

[BibT_eX]

[DOI]

Proc. IEEE, 2019

An FPGA-Based BWT Accelerator for Bzip2 Data Compression.

[BibT_eX]

[DOI]

Weikang Qiao

Proceedings of the 27th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2019

Rethinking Integer Divider Design for FPGA-Based Soft-Processors.

[BibT_eX]

[DOI]

Proceedings of the 27th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2019

Understanding Performance Gains of Accelerator-Rich Architectures.

[BibT_eX]

[DOI]

Proceedings of the 30th IEEE International Conference on Application-specific Systems, 2019

2018

CPU-FPGA Coscheduling for Big Data Applications.

[BibT_eX]

[DOI]

IEEE Des. Test, 2018

Best-Effort FPGA Programming: A Few Steps Can Go a Long Way.

[BibT_eX]

[DOI]

CoRR, 2018

Doppio: I/O-Aware Performance Analysis, Modeling and Optimization for In-memory Computing Framework.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2018

High-Throughput Lossless Compression on Tightly Coupled CPU-FPGA Platforms: (Abstract Only).

[BibT_eX]

[DOI]

Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2018

Understanding Performance Differences of FPGAs and GPUs: (Abtract Only).

[BibT_eX]

[DOI]

Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2018

K-Flow: A Programming and Scheduling Framework to Optimize Dataflow Execution on CPU-FPGA Platforms: (Abstract Only).

[BibT_eX]

[DOI]

Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2018

High-Throughput Lossless Compression on Tightly Coupled CPU-FPGA Platforms.

[BibT_eX]

[DOI]