Zhengyu He

Orcid: 0009-0002-7682-1019

According to our database1, Zhengyu He authored at least 20 papers between 2009 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
Building a Lightweight Trusted Execution Environment for Arm GPUs.
IEEE Trans. Dependable Secur. Comput., 2024

SoK: A Comparison Study of Arm TrustZone and CCA.
Proceedings of the International Symposium on Secure and Private Execution Environment Design, 2024

CAGE: Complementing Arm CCA with GPU Extensions.
Proceedings of the 31st Annual Network and Distributed System Security Symposium, 2024

Verifying Rust Implementation of Page Tables in a Software Enclave Hypervisor.
Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2024

2023
SHELTER: Extending Arm CCA with Isolation in User Space.
Proceedings of the 32nd USENIX Security Symposium, 2023

PVM: Efficient Shadow Paging for Deploying Secure Containers in Cloud-native Environment.
Proceedings of the 29th Symposium on Operating Systems Principles, 2023

2022
HyperEnclave: An Open and Cross-platform Trusted Execution Environment.
Proceedings of the 2022 USENIX Annual Technical Conference, 2022

StrongBox: A GPU TEE on Arm Endpoints.
Proceedings of the 2022 ACM SIGSAC Conference on Computer and Communications Security, 2022

2020
Image Stitching Using Green Coordinates and Robust Elastic Warping.
Proceedings of the 10th Annual Computing and Communication Workshop and Conference, 2020

2013
A queuing model-based approach for the analysis of transactional memory systems.
Concurr. Comput. Pract. Exp., 2013

2012
On algorithm design and programming model for multi-threaded computing.
PhD thesis, 2012

On Adaptive Contention Management Strategies for Software Transactional Memory.
Proceedings of the 10th IEEE International Symposium on Parallel and Distributed Processing with Applications, 2012

Profiling-based Adaptive Contention Management for Software Transactional Memory.
Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium, 2012

PMU-guided Priority Adjustment to Guarantee Thread Performance on IBM POWER SMT Processor.
Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium Workshops & PhD Forum, 2012

2011
An Asynchronous Multithreaded Algorithm for the Maximum Network Flow Problem with Nonblocking Global Relabeling Heuristic.
IEEE Trans. Parallel Distributed Syst., 2011

2010
An Analytical Model on the Execution of Transactional Memory.
Proceedings of the 22st International Symposium on Computer Architecture and High Performance Computing, 2010

Modeling the Run-time Behavior of Transactional Memory.
Proceedings of the MASCOTS 2010, 2010

Dynamically tuned push-relabel algorithm for the maximum flow problem on CPU-GPU-Hybrid platforms.
Proceedings of the 24th IEEE International Symposium on Parallel and Distributed Processing, 2010

2009
On the Performance of Commit-Time-Locking Based Software Transactional Memory.
Proceedings of the 11th IEEE International Conference on High Performance Computing and Communications, 2009

Impact of early abort mechanisms on lock-based software transactional memory.
Proceedings of the 16th International Conference on High Performance Computing, 2009


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