Zhenghao Lu
Orcid: 0009-0000-1147-6897
According to our database1,
Zhenghao Lu
authored at least 24 papers
between 2006 and 2024.
Collaborative distances:
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Bibliography
2024
A Two-Step Time-to-Digital Converter With 5.6-ps Resolution and 1-4255-μs Measurement Range.
IEEE Trans. Circuits Syst. II Express Briefs, February, 2024
Microelectron. J., 2024
IACR Cryptol. ePrint Arch., 2024
Proceedings of the 38th International Symposium on Distributed Computing, 2024
A Novel Balanced Detection Based Optoelectronic Front End Circuit for FMCW LiDAR System.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
A 2.1/5.2-NEF/PEF Capacitively Coupled Instrumentation Amplifier with Fast - Settling for Biosensor.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
Active Disturbance Rejection Control of Permanent Magnet Synchronous Motor Based on Improved Dung Beetle Algorithm.
Proceedings of the 2024 3rd International Conference on Cyber Security, 2024
2023
Design and Implementation of an Event-Driven Smart Sensor Node for Wireless Monitoring Systems.
Sensors, December, 2023
A Linear-in-Decibel Automatic Gain Control Amplifier With Dual Mode Continuous Gain Tuning.
IEEE Trans. Circuits Syst. I Regul. Pap., July, 2023
Large Scale Training of Graph Neural Networks for Optimal Markov-Chain Partitioning Using the Kemeny Constant.
CoRR, 2023
Concurrent Multiband CMOS Low Noise Amplifier Design for Internet of Things Applications.
Proceedings of the 15th IEEE International Conference on ASIC, 2023
2021
A digital background calibration scheme for non-linearity of SAR ADC using back-propagation algorithm.
Microelectron. J., 2021
2020
Microelectron. J., 2020
An Ultra-low Power Relaxation Oscillator with Novel Ultra-low Leakage Switch and Temperature-compensated Resistor.
Proceedings of the 2020 IEEE International Conference on Integrated Circuits, 2020
2019
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
2016
Circuits Syst. Signal Process., 2016
2013
A 12-mW 40-60-GHz 0.18- $\mu {\hbox {m}}$ BiCMOS Oscillator-Less Self-Demodulator for Short-Range Software-Defined Transceivers.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2013
Reduced complexity implementation of quasi-cyclic LDPC decoders by parity-check matrix reordering.
Proceedings of the IEEE 10th International Conference on ASIC, 2013
2012
Proceedings of the International SoC Design Conference, 2012
2011
Proceedings of the International SoC Design Conference, 2011
Parallel structure of GF (2<sup>14</sup>) and GF (2<sup>16</sup>) multipliers based on composite finite fields.
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011
2010
IEEE Trans. Very Large Scale Integr. Syst., 2010
2007
IEEE Trans. Circuits Syst. I Regul. Pap., 2007
2006
A novel CMOS low-noise amplifier design for 3.1- to 10.6-GHz ultra-wide-band wireless receivers.
IEEE Trans. Circuits Syst. I Regul. Pap., 2006