Zhengfeng Huang

According to our database, Zhengfeng Huang authored at least 160 papers between 2003 and 2025.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2025

Cost Efficient Flip-Flop Designs With Multiple-Node Upset-Tolerance and Algorithm-Based Verifications.

Aibin Yan, Yuting He, Zhengfeng Huang, Wenjie Yan, Jie Cui, Xiaolei Wang, Tianming Ni, Patrick Girard, Xiaoqing Wen

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., January, 2025

2024

NEST: A Quadruple-Node Upset Recovery Latch Design and Algorithm-Based Recovery Optimization.

Zhengfeng Huang, Liting Sun, Xu Wang, Huaguo Liang, Yingchun Lu, Aibin Yan, Jun Pan, Xiaoqing Wen

IEEE Trans. Aerosp. Electron. Syst., August, 2024

DBU-PG: energy-efficient noc design using dual-buffering power gating.

Yiming Ouyang, Cheng Cao, Dongyu Xu, Wu Zhou, Zhengfeng Huang, Huaguo Liang

J. Supercomput., July, 2024

Lightweight Hybrid Entropy Source True Random Number Generator Based on Jitter and Metastability.

Shihao Yang, Huaguo Liang, Rong Hu, Liang Yao, Zhengfeng Huang, Maoxiang Yi, Yingchun Lu

IEEE Trans. Circuits Syst. II Express Briefs, July, 2024

Test Cost Reduction for VLSI Adaptive Test With K-Nearest Neighbor Classification Algorithm.

Tai Song, Zhengfeng Huang, Li Zhang, Qi Hong, Zhao Yang, Milos Krstic

IEEE Trans. Circuits Syst. II Express Briefs, July, 2024

MURLAV: A Multiple-Node-Upset Recovery Latch and Algorithm-Based Verification Method.

Aibin Yan, Zhixing Li, Zhongyu Gao, Jing Zhang, Zhengfeng Huang, Tianming Ni, Jie Cui, Xiaolei Wang, Patrick Girard, Xiaoqing Wen

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., July, 2024

Wafer-level Adaptive Testing Based on Dual-Predictor Collaborative Decision.

Yuqi Pan, Huaguo Liang, Junming Li, Jinxing Qu, Zhengfeng Huang, Maoxiang Yi, Yingchun Lu

J. Electron. Test., June, 2024

FeMPIM: A FeFET-Based Multifunctional Processing-in-Memory Cell.

Aibin Yan, Yu Chen, Zhongyu Gao, Tianming Ni, Zhengfeng Huang, Jie Cui, Patrick Girard, Xiaoqing Wen

IEEE Trans. Circuits Syst. II Express Briefs, April, 2024

Designs of High-Speed Triple-Node-Upset Hardened Latch Based on Dual-Modular-Redundancy.

Zhengfeng Huang, Yan Zhang, Lei Ai, Huaguo Liang, Tianming Ni, Tai Song, Aibin Yan

J. Circuits Syst. Comput., March, 2024

Reliability analysis and comparison of ring-PUF based on probabilistic models.

Jingchang Bian, Zhengfeng Huang, Yankun Lin, Zhao Yang, Huaguo Liang, Tianming Ni

Microelectron. J., February, 2024

A Quadruple-Node Upsets Hardened Latch Design Based on Cross-Coupled Elements.

Zhengfeng Huang, Zishuai Li, Liting Sun, Huaguo Liang, Tianming Ni, Aibin Yan

J. Electron. Test., February, 2024

Nonvolatile Latch Designs With Node-Upset Tolerance and Recovery Using Magnetic Tunnel Junctions and CMOS.

Aibin Yan, Litao Wang, Jie Cui, Zhengfeng Huang, Tianming Ni, Patrick Girard, Xiaoqing Wen

IEEE Trans. Very Large Scale Integr. Syst., January, 2024

A Compact TRNG Design for FPGA Based on the Metastability of RO-driven Shift Registers.

Qingsong Peng, Jingchang Bian, Zhengfeng Huang, Senling Wang, Aibin Yan

ACM Trans. Design Autom. Electr. Syst., January, 2024

A Reliability-Aware Splitting Duty-Cycle Physical Unclonable Function Based on Trade-off Process, Voltage, and Temperature Variations.

Jingchang Bian, Zhengfeng Huang, Peng Ye, Zhao Yang, Huaguo Liang

ACM Trans. Design Autom. Electr. Syst., January, 2024

Design Guidelines and Feedback Structure of Ring Oscillator PUF for Performance Improvement.

Zhengfeng Huang, Jingchang Bian, Yankun Lin, Huaguo Liang, Tianming Ni

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., January, 2024

Hardened latch designs based on the characteristic of transistor for mitigating multiple-node-upsets in harsh radiation environments.

Hui Xu, Chaoming Liu, Ruijun Ma, Tai Song, Zhengfeng Huang, Jun Wang, Xuewei Qin, Yu Xia

Microelectron. J., January, 2024

Efficient design approaches to CMOS full adder circuits.

Aibin Yan, Han Bao, Wangjin Jiang, Jie Cui, Zhengfeng Huang, Xiaoqing Wen

Microelectron. J., 2024

A cost-effective and highly robust triple-node-upset self-recoverable latch design based on dual-output C-elements.

Hui Xu, Lin Tang, Ruijun Ma, Huaguo Liang, Zhengfeng Huang, Tianming Ni, Jiuqi Li, Xiaodong Ai

Microelectron. J., 2024

A lightweight reversible multi-mode physical unclonable function.

Zhengfeng Huang, Peng Ye, Ruixiang Liu, Jingchang Bian, Zhao Yang, Yingchun Lu, Yiming Ouyang, Huaguo Liang, Tianming Ni

Microelectron. J., 2024

Design of radiation hardened latch with low delay and tolerance of quadruple-node-upset in 32 nm process.

Zhengfeng Huang, Xin Chen, Xinyu Jiang, Lei Ai, Huaguo Liang, Yiming Ouyang, Tianming Ni

Microelectron. J., 2024

Applying SMART-Based Power Gating Approach in NoC System.

Yiming Ouyang, Cheng Cao, Qi Wang, Zhengfeng Huang

J. Circuits Syst. Comput., 2024

Design of novel low cost triple-node-upset self-recoverable hardened latch.

Hui Xu, Shuo Zhu, Ruijun Ma, Zhengfeng Huang, Huaguo Liang, Haojie Sun, Chaoming Liu

Integr., 2024

A self-training end-to-end mask optimization framework based on semantic segmentation network.

Hui Xu, Fuxin Tang, Pan Qi, Ye Yuan, Huaguo Liang, Zhengfeng Huang

Integr., 2024

Multi-transition delay test for improving the coverage of cell internal defects.

Hong Zhang, Huaguo Liang, Yue Wang, Danqing Li, Zhiwei Shao, Maoxiang Yi, Yingchun Lu, Zhengfeng Huang

IEICE Electron. Express, 2024

Multiple-Error Interceptive Voter Designs for Safety-Critical Applications.

Xuehua Li, Jie Song, Chunjiong Zhang, Yuting He, Xiaoqing Wen, Zhengfeng Huang

Proceedings of the IEEE International Test Conference in Asia, 2024

PFO PUF: A Lightweight Parallel Feed Obfuscation PUF Resistant to Machine Learning Attacks.

Zhengfeng Huang, Yankun Lin, Fansheng Zeng, Jingchang Bian, Zhao Yang, Huaguo Liang, Yingchun Lu, Liang Yao, Xiaoqing Wen, Tianming Ni

Proceedings of the IEEE International Test Conference in Asia, 2024

A RO-Integrated-LFSR-Based Nonlinear Strong PUF with Intrinsic Modeling Attacks Resilience.

Jingchang Bian, Zhengfeng Huang, Ruixiang Liu, Yankun Lin, Zhao Yang, Huaguo Liang, Aibin Yan

Proceedings of the IEEE International Test Conference in Asia, 2024

Nonvolatile and SEU-Recoverable Latch Based on FeFET and CMOS for Energy-Harvesting Devices.

Aibin Yan, Zhuoyuan Lin, Guangzhu Liu, Qingyang Zhang, Zhengfeng Huang, Jie Cui, Xiaoqing Wen, Patrick Girard

Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

Machine Learning-Based Diagnosis of Defects in Chiplet Interconnects.

Junming Li, Huaguo Liang, Xianrui Dou, Le Yu, Zhengfeng Huang, Yingchun Lu, Cuiyun Jiang

Proceedings of the International 3D Systems Integration Conference, 2024

2023

RMC_NoC: A Reliable On-Chip Network Architecture With Reconfigurable Multifunctional Channel.

Dongyu Xu, Yiming Ouyang, Wu Zhou, Zhengfeng Huang, Huaguo Liang, Xiaoqing Wen

IEEE Trans. Very Large Scale Integr. Syst., December, 2023

High-efficiency TRNG Design Based on Multi-bit Dual-ring Oscillator.

Yingchun Lu, Yun Yang, Rong Hu, Huaguo Liang, Maoxiang Yi, Zhengfeng Huang, Yuanming Ma, Tian Chen, Liang Yao

ACM Trans. Reconfigurable Technol. Syst., December, 2023

Design of True Random Number Generator Based on Multi-Ring Convergence Oscillator Using Short Pulse Enhanced Randomness.

Tianming Ni, Qingsong Peng, Jingchang Bian, Liang Yao, Zhengfeng Huang, Aibin Yan, Senling Wang, Xiaoqing Wen

IEEE Trans. Circuits Syst. I Regul. Pap., December, 2023

Overhead Optimized and Quadruple-Node-Upset Self-Recoverable Latch Design Based on Looped C-Element Matrix.

Zhengfeng Huang, Dongxing Ma, Runwu Ji, Huaguo Liang, Aibin Yan, Tai Song, Tianming Ni

IEEE Trans. Aerosp. Electron. Syst., December, 2023

Two sextuple cross-coupled SRAM cells with double-node-upset protection and cost optimization for aerospace applications.

Aibin Yan, Jing Xiang, Yang Chang, Zhengfeng Huang, Jie Cui, Patrick Girard, Xiaoqing Wen

Microelectron. J., September, 2023

Novel Critical Gate-Based Circuit Path-Level NBTI-Aware Aging Circuit Degradation Prediction.

Hui Xu, Rui Zhu, Xia Sun, Xianjin Fang, Pan Qi, Huaguo Liang, Zhengfeng Huang

J. Circuits Syst. Comput., August, 2023

A Highly Robust and Low-Power Flip-Flop Cell With Complete Double-Node-Upset Tolerance for Aerospace Applications.

Aibin Yan, Yuting He, Xiaoxiao Niu, Jie Cui, Tianming Ni, Zhengfeng Huang, Patrick Girard, Xiaoqing Wen

IEEE Des. Test, August, 2023

LDAVPM: A Latch Design and Algorithm-Based Verification Protected Against Multiple-Node-Upsets in Harsh Radiation Environments.

Aibin Yan, Zhixing Li, Jie Cui, Zhengfeng Huang, Tianming Ni, Patrick Girard, Xiaoqing Wen

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., June, 2023

Designs of Two Quadruple-Node-Upset Self-Recoverable Latches for Highly Robust Computing in Harsh Radiation Environments.

Aibin Yan, Zhixing Li, Jie Cui, Zhengfeng Huang, Tianming Ni, Patrick Girard, Xiaoqing Wen

IEEE Trans. Aerosp. Electron. Syst., June, 2023

A Soft-Error-Immune Quadruple-Node-Upset Tolerant Latch.

Zhengfeng Huang, Lanxi Duan, Yan Zhang, Tianming Ni, Aibin Yan

IEEE Trans. Aerosp. Electron. Syst., June, 2023

Low Overhead and High Stability Radiation-Hardened Latch for Double/Triple Node Upsets.

Zhengfeng Huang, Hao Wang, Dongxing Ma, Huaguo Liang, Yiming Ouyang, Aibin Yan

J. Electron. Test., June, 2023

Design of approximate Booth multipliers based on error compensation.

Yongxia Sheng, Huaguo Liang, Bao Fang, Cuiyun Jiang, Zhengfeng Huang, Maoxiang Yi, Yingchun Lu

Integr., May, 2023

Energy-Efficient Multiple Network-on-Chip Architecture With Bandwidth Expansion.

Wu Zhou, Yiming Ouyang, Dongyu Xu, Zhengfeng Huang, Huaguo Liang, Xiaoqing Wen

IEEE Trans. Very Large Scale Integr. Syst., April, 2023

Cost-Effective Path Delay Defect Testing Using Voltage/Temperature Analysis Based on Pattern Permutation.

Tai Song, Zhengfeng Huang, Xiaohui Guo, Krstic Milos

J. Electron. Test., April, 2023

Two Double-Node-Upset-Hardened Flip-Flop Designs for High-Performance Applications.

Aibin Yan, Aoran Cao, Zhengfeng Huang, Jie Cui, Tianming Ni, Patrick Girard, Xiaoqing Wen, Jiliang Zhang

IEEE Trans. Emerg. Top. Comput., 2023

Improvement of cell internal weak defects detection under process variation by optimizing test path and test pattern.

Hong Zhang, Huaguo Liang, Jiewen Hu, Zhiwei Shao, Maoxiang Yi, Yingchun Lu, Zhengfeng Huang

Microelectron. J., 2023

Fault-avoidance C-element based low overhead and TNU-resilient latch.

Zhengfeng Huang, Zhouyu Gong, Dongxing Ma, Xiaolei Wang, Yingchun Lu, Wenfa Zhan, Huaguo Liang, Tianming Ni

Microelectron. J., 2023

LQNTL: Low-overhead quadruple-node-upset self-recovery latch based on triple-mode redundancy.

Hui Xu, Jing Zhou, Ruijun Ma, Huaguo Liang, Zhengfeng Huang, Chaoming Liu

Integr., 2023

Design of a Novel Latch with Quadruple-Node-Upset Recovery for Harsh Radiation Hardness.

Aibin Yan, Chao Zhou, Shaojie Wei, Jie Cui, Zhengfeng Huang, Patrick Girard, Xiaoqing Wen

Proceedings of the IEEE International Test Conference in Asia, 2023

A Low Overhead and Double-Node-Upset Self-Recoverable Latch.

Aibin Yan, Fan Xia, Tianming Ni, Jie Cui, Zhengfeng Huang, Patrick Girard, Xiaoqing Wen

Proceedings of the IEEE International Test Conference in Asia, 2023

Design of A Highly Reliable and Low-Power SRAM With Double-Node Upset Recovery for Safety-critical Applications.

Aibin Yan, Jing Xiang, Zhengfeng Huang, Tianming Ni, Jie Cui, Patrick Girard, Xiaoqing Wen

Proceedings of the IEEE International Test Conference in Asia, 2023

Design of Low-Cost Approximate CMOS Full Adders.

Aibin Yan, Shaojie Wei, Zhixing Li, Jie Cui, Zhengfeng Huang, Patrick Girard, Xiaoqing Wen

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

A Method of Indoor Space Layout for Home Stay Based on Binocular Vision SLAM.

Liushi Qin, Zhengfeng Huang

Proceedings of the Multimedia Technology and Enhanced Learning, 2023

Intelligent Extraction of Color Features in Architectural Space Based on Machine Vision.

Zhengfeng Huang, Liushi Qin

Proceedings of the Multimedia Technology and Enhanced Learning, 2023

Two Highly Reliable and High-Speed SRAM Cells for Safety-Critical Applications.

Aibin Yan, Yang Chang, Jing Xiang, Hao Luo, Jie Cui, Zhengfeng Huang, Tianming Ni, Xiaoqing Wen

Proceedings of the Great Lakes Symposium on VLSI 2023, 2023

A Robust and High-Performance Flip-Flop with Complete Soft-Error Recovery.

Aibin Yan, Xuehua Li, Tianming Ni, Zhengfeng Huang, Xiaoqing Wen

Proceedings of the 10th International Conference on Dependable Systems and Their Applications, 2023

High Performance and DNU-Recovery Spintronic Retention Latch for Hybrid MTJ/CMOS Technology.

Aibin Yan, Zhen Zhou, Liang Ding, Jie Cui, Zhengfeng Huang, Xiaoqing Wen, Patrick Girard

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

Advanced DICE Based Triple-Node-Upset Recovery Latch with Optimized Overhead for Space Applications.

Aibin Yan, Xuehua Li, Zhongyu Gao, Zhengfeng Huang, Tianming Ni, Xiaoqing Wen

Proceedings of the 32nd IEEE Asian Test Symposium, 2023

A High-Performance and P-Type FeFET-Based Non-Volatile Latch.

Aibin Yan, Yu Chen, Zhengfeng Huang, Jie Cui, Xiaoqing Wen

Proceedings of the 32nd IEEE Asian Test Symposium, 2023

2022

Novel Quadruple-Node-Upset-Tolerant Latch Designs With Optimized Overhead for Reliable Computing in Harsh Radiation Environments.

Aibin Yan, Zhelong Xu, Xiangfeng Feng, Jie Cui, Zhili Chen, Tianming Ni, Zhengfeng Huang, Patrick Girard, Xiaoqing Wen

IEEE Trans. Emerg. Top. Comput., 2022

Design of True Random Number Generator Based on Multi-Stage Feedback Ring Oscillator.

Jianguo Cui, Maoxiang Yi, Di Cao, Liang Yao, Xinyu Wang, Huaguo Liang, Zhengfeng Huang, Haochen Qi, Tianming Ni, Yingchun Lu

IEEE Trans. Circuits Syst. II Express Briefs, 2022

Cost-Effective and Highly Reliable Circuit-Components Design for Safety-Critical Applications.

Aibin Yan, Zhengzheng Fan, Liang Ding, Jie Cui, Zhengfeng Huang, Qijun Wang, Hao Zheng, Patrick Girard, Xiaoqing Wen

IEEE Trans. Aerosp. Electron. Syst., 2022

M-RO PUF: A portable pure digital RO PUF based on MUX unit.

Liang Yao, Huaguo Liang, Qian Han, Hong Zhang, Zhengfeng Huang, Cuiyun Jiang, Maoxiang Yi, Yingchun Lu

Microelectron. J., 2022

A reconfigurable PUF structure with dual working modes based on entropy separation model.

Yanjie Wang, Huaguo Liang, Yuchuan Wang, Liang Yao, Maoxiang Yi, Zhengfeng Huang, Yingchun Lu

Microelectron. J., 2022

RLDA: Valid test pattern identification by machine learning classification method for VLSI test.

Tai Song, Zhengfeng Huang, Xiaohui Guo

Microelectron. J., 2022

Low-Power Anti-Glitch Double-Edge Triggered Flip-Flop Based on Robust C-Elements.

Zhengfeng Huang, Wanshu Zhong, Lanxi Duan, Yue Zhang, Huaguo Liang, Jianan Wang, Tai Song, Yingchun Lu

J. Circuits Syst. Comput., 2022

A double-node-upset completely tolerant CMOS latch design with extremely low cost for high-performance applications.

Aibin Yan, Kuikui Qian, Tai Song, Zhengfeng Huang, Tianming Ni, Yu Chen, Xiaoqing Wen

Integr., 2022

Valid test pattern identification for VLSI adaptive test.

Tai Song, Tianming Ni, Zhengfeng Huang, Jinlei Wan

Integr., 2022

Machine learning classification algorithm for VLSI test cost reduction.

Tai Song, Zhengfeng Huang, Aibin Yan

Integr., 2022

A Low Power-Consumption Triple-Node-Upset-Tolerant Latch Design.

Yingchun Lu, Guangzhen Hu, Jianan Wang, Hao Wang, Liang Yao, Huaguo Liang, Maoxiang Yi, Zhengfeng Huang

J. Electron. Test., 2022

Broadcast-TDMA: A Cost-Effective Fault-Tolerance Method for TSV Lifetime Reliability Enhancement.

Tianming Ni, Jingchang Bian, Zhao Yang, Mu Nie, Liang Yao, Zhengfeng Huang, Aibin Yan, Xiaoqing Wen

IEEE Des. Test, 2022

A Highly Reliable and Low Power RHBD Flip-Flop Cell for Aerospace Applications.

Aibin Yan, Kuikui Qian, Jie Cui, Ningning Cui, Zhengfeng Huang, Xiaoqing Wen, Patrick Girard

Proceedings of the 40th IEEE VLSI Test Symposium, 2022

Cost-Optimized and Robust Latch Hardened against Quadruple Node Upsets for Nanoscale CMOS.

Aibin Yan, Shukai Song, Jixiang Zhang, Jie Cui, Zhengfeng Huang, Tianming Ni, Xiaoqing Wen, Patrick Girard

Proceedings of the IEEE International Test Conference in Asia, 2022

Two 0.8 V, Highly Reliable RHBD 10T and 12T SRAM Cells for Aerospace Applications.

Aibin Yan, Zhihui He, Jing Xiang, Jie Cui, Yong Zhou, Zhengfeng Huang, Patrick Girard, Xiaoqing Wen

Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022

Sextuple Cross-Coupled-DICE Based Double-Node-Upset Recoverable and Low-Delay Flip-Flop for Aerospace Applications.

Aibin Yan, Yu Chen, Shukai Song, Zijie Zhai, Jie Cui, Zhengfeng Huang, Patrick Girard, Xiaoqing Wen

Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022

A Radiation-Hardened Non-Volatile Magnetic Latch with High Reliability and Persistent Storage.

Aibin Yan, Liang Ding, Zhen Zhou, Zhengfeng Huang, Jie Cui, Patrick Girard, Xiaoqing Wen

Proceedings of the IEEE 31st Asian Test Symposium, 2022

MRCO: A Multi-ring Convergence Oscillator-based High-Efficiency True Random Number Generator.

Tianming Ni, Qingsong Peng, Jingchang Bian, Liang Yao, Zhengfeng Huang, Aibin Yan, Xiaoqing Wen

Proceedings of the Asian Hardware Oriented Security and Trust Symposium, 2022

2021

Pure Digital Scalable Mixed Entropy Separation Structure for Physical Unclonable Function and True Random Number Generator.

Yingchun Lu, Xinyu Wang, Yanjie Wang, Yuan Zhang, Liang Yao, Maoxiang Yi, Zhengfeng Huang, Huaguo Liang

IEEE Trans. Very Large Scale Integr. Syst., 2021

Novel Low Cost, Double-and-Triple-Node-Upset-Tolerant Latch Designs for Nano-scale CMOS.

Aibin Yan, Chaoping Lai, Yinlei Zhang, Jie Cui, Zhengfeng Huang, Jie Song, Jing Guo, Xiaoqing Wen

IEEE Trans. Emerg. Top. Comput., 2021

A Novel TDMA-Based Fault Tolerance Technique for the TSVs in 3D-ICs Using Honeycomb Topology.

Tianming Ni, Zhao Yang, Hao Chang, Xiaoqiang Zhang, Lin Lu, Aibin Yan, Zhengfeng Huang, Xiaoqing Wen

IEEE Trans. Emerg. Top. Comput., 2021

High-Throughput Portable True Random Number Generator Based on Jitter-Latch Structure.

Xinyu Wang, Huaguo Liang, Yanjie Wang, Liang Yao, Yang Guo, Maoxiang Yi, Zhengfeng Huang, Haochen Qi, Yingchun Lu

IEEE Trans. Circuits Syst. I Regul. Pap., 2021

A Cost-Effective TSV Repair Architecture for Clustered Faults in 3-D IC.

Tianming Ni, Qi Xu, Zhengfeng Huang, Huaguo Liang, Aibin Yan, Xiaoqing Wen

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

A high reliability physically unclonable function based on multiple tunable ring oscillator.

Yuan Zhang, Huaguo Liang, Liang Yao, Maoxiang Yi, Zhengfeng Huang, Yingchun Lu

Microelectron. J., 2021

Dual-modular-redundancy and dual-level error-interception based triple-node-upset tolerant latch designs for safety-critical applications.

Aibin Yan, Zhihui He, Jun Zhou, Jie Cui, Tianming Ni, Zhengfeng Huang, Xiaoqing Wen, Patrick Girard

Microelectron. J., 2021

A high-speed and triple-node-upset recovery latch with heterogeneous interconnection.

Zhengfeng Huang, Hao Wang, Yang Ang, Huaguo Liang, Yiming Ouyang, Tianming Ni

Microelectron. J., 2021

LC-TSL: A low-cost triple-node-upset self-recovery latch design based on heterogeneous elements for 22 nm CMOS.

Zhengfeng Huang, Shangjie Pan, Hao Wang, Huaguo Liang, Tianming Ni

Microelectron. J., 2021

Design of MNU-Resilient latches based on input-split C-elements.

Zhengfeng Huang, Xiandong Li, Zhouyu Gong, Huaguo Liang, Yingchun Lu, Yiming Ouyang, Tianming Ni

Microelectron. J., 2021

Design of node separated triple-node-upset self-recoverable latch.

Zhengfeng Huang, Di Cao, Jianguo Cui, Yingchun Lu, Huaguo Liang, Yiming Ouyang, Tianming Ni, Zhenmin Li

Microelectron. J., 2021

Cross-Layer Dual Modular Redundancy Hardened Scheme of Flip-Flop Design Based on Sense-Amplifier.

Zhengfeng Huang, Zian Su, Tianming Ni, Qi Xu, Haochen Qi, Yingchun Lu, Manzi Eric, Hui Xu

J. Circuits Syst. Comput., 2021

Approximate multipliers based on a novel unbiased approximate 4-2 compressor.

Bao Fang, Huaguo Liang, Dawen Xu, Maoxiang Yi, Yongxia Sheng, Cuiyun Jiang, Zhengfeng Huang, Yingchun Lu

Integr., 2021

Chip test pattern reordering method using adaptive test to reduce cost for testing of ICs.

Tai Song, Huaguo Liang, Zhengfeng Huang, Tianming Ni, Ying Sun

IEICE Electron. Express, 2021

Design of a Highly Robust Triple-Node-Upset Self-Recoverable Latch.

Hui Xu, Cong Sun, Le Zhou, Huaguo Liang, Zhengfeng Huang

IEEE Access, 2021

Congestion Pattern Prediction for a Busy Traffic Zone Based on the Hidden Markov Model.

Tingting Sun, Zhengfeng Huang, Hongdong Zhu, Yanhao Huang, Pengjun Zheng

IEEE Access, 2021

A Sextuple Cross-Coupled Dual-Interlocked-Storage-Cell based Multiple-Node-Upset Self-Recoverable Latch.

Aibin Yan, Kuikui Qian, Jie Cui, Ningning Cui, Tianming Ni, Zhengfeng Huang, Xiaoqing Wen

Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2021

A N: 1 Single-Channel TDMA Fault-Tolerant Technique for TSVs in 3D-ICs.

Huaguo Liang, Danqing Li, Zhao Yang, Tianming Ni, Zhengfeng Huang, Cuiyun Jiang

Proceedings of the IEEE International Test Conference in Asia, 2021

Kelvin Bridge Structure Based TSV Test for Weak Faults.

Chang Hao, Zhengfeng Huang, Tianming Ni

Proceedings of the IEEE International Test Conference in Asia, 2021

TPDICE and Sim Based 4-Node-Upset Completely Hardened Latch Design for Highly Robust Computing in Harsh Radiation.

Aibin Yan, Liang Ding, Chuanbo Shan, Haoran Cai, Xiaofeng Chen, Zhanjun Wei, Zhengfeng Huang, Xiaoqing Wen

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

GAME: Gaussian Mixture Model Mapping and Navigation Engine on Embedded FPGA.

Yuanfan Xu, Zhaoliang Zhang, Jincheng Yu, Jianfei Cao, Haolin Dong, Zhengfeng Huang, Yu Wang, Huazhong Yang

Proceedings of the 29th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2021

2020

Architecture of Cobweb-Based Redundant TSV for Clustered Faults.

Tianming Ni, Dongsheng Liu, Qi Xu, Zhengfeng Huang, Huaguo Liang, Aibin Yan

IEEE Trans. Very Large Scale Integr. Syst., 2020

Quadruple Cross-Coupled Dual-Interlocked-Storage-Cells-Based Multiple-Node-Upset-Tolerant Latch Designs.

Aibin Yan, Yafei Ling, Jie Cui, Zhili Chen, Zhengfeng Huang, Jie Song, Patrick Girard, Xiaoqing Wen

IEEE Trans. Circuits Syst. I Regul. Pap., 2020

Non-Intrusive Online Distributed Pulse Shrinking-Based Interconnect Testing in 2.5D IC.

Tianming Ni, Hao Chang, Tai Song, Qi Xu, Zhengfeng Huang, Huaguo Liang, Aibin Yan, Xiaoqing Wen

IEEE Trans. Circuits Syst., 2020

LCHR-TSV: Novel Low Cost and Highly Repairable Honeycomb-Based TSV Redundancy Architecture for Clustered Faults.

Tianming Ni, Yao Yao, Hao Chang, Lin Lu, Huaguo Liang, Aibin Yan, Zhengfeng Huang, Xiaoqing Wen

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Information Assurance Through Redundant Design: A Novel TNU Error-Resilient Latch for Harsh Radiation Environment.

Aibin Yan, Yuanjie Hu, Jie Cui, Zhili Chen, Zhengfeng Huang, Tianming Ni, Patrick Girard, Xiaoqing Wen

IEEE Trans. Computers, 2020

A Novel Low-Cost TMR-Without-Voter Based HIS-Insensitive and MNU-Tolerant Latch Design for Aerospace Applications.

Aibin Yan, Zhelong Xu, Kang Yang, Jie Cui, Zhengfeng Huang, Patrick Girard, Xiaoqing Wen

IEEE Trans. Aerosp. Electron. Syst., 2020

Design of Double-Upset Recoverable and Transient-Pulse Filterable Latches for Low-Power and Low-Orbit Aerospace Applications.

Aibin Yan, Yan Chen, Zhelong Xu, Zhili Chen, Jie Cui, Zhengfeng Huang, Patrick Girard, Xiaoqing Wen

IEEE Trans. Aerosp. Electron. Syst., 2020

CC-RTSV: Cross-Cellular Based Redundant TSV Design for 3D ICs.

Tianming Ni, Yue Shu, Hao Chang, Lin Lu, Guangzhen Dai, Shidong Zhu, Chengming Qu, Zhengfeng Huang

J. Circuits Syst. Comput., 2020

Fault tolerance in memristive crossbar-based neuromorphic computing systems.

Qi Xu, Song Chen, Hao Geng, Bo Yuan, Bei Yu, Feng Wu, Zhengfeng Huang

Integr., 2020

Pattern Reorder for Test Cost Reduction Through Improved SVMRANK Algorithm.

Tai Song, Huaguo Liang, Tianming Ni, Zhengfeng Huang, Yingchun Lu, Jinlei Wan, Aibin Yan

IEEE Access, 2020

Jitter-Quantizing-Based TRNG Robust Against PVT Variations.

Yingchun Lu, Huaguo Liang, Liang Yao, Xinyu Wang, Haochen Qi, Maoxiang Yi, Cuiyun Jiang, Zhengfeng Huang

IEEE Access, 2020

A SEU Immune Flip-Flop with Low Overhead.

Zhengfeng Huang, Xiandong Li, Shangjie Pan, Min Wang, Tianming Ni

Proceedings of the Machine Learning for Cyber Security - Third International Conference, 2020

Dual-Interlocked-Storage-Cell-Based Double-Node-Upset Self-Recoverable Flip-Flop Design for Safety-Critical Applications.

Aibin Yan, Zhelong Xu, Jie Cui, Zuobin Ying, Zhengfeng Huang, Huaguo Liang, Patrick Girard, Xiaoqing Wen

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

CNN-based Monocular Decentralized SLAM on embedded FPGA.

Jincheng Yu, Feng Gao, Jianfei Cao, Chao Yu, Zhaoliang Zhang, Zhengfeng Huang, Yu Wang, Huazhong Yang

Proceedings of the 2020 IEEE International Parallel and Distributed Processing Symposium Workshops, 2020

2019

A Double-Node-Upset Self-Recoverable Latch Design for High Performance and Low Power Application.

Aibin Yan, Kang Yang, Zhengfeng Huang, Jiliang Zhang, Jie Cui, Xiangsheng Fang, Maoxiang Yi, Xiaoqing Wen

IEEE Trans. Circuits Syst. II Express Briefs, 2019

Design of Wireless Network on Chip with Priority-Based MAC.

Yiming Ouyang, Yang Zhao, Kun Xing, Zhengfeng Huang, Huaguo Liang, Jianhua Li

J. Circuits Syst. Comput., 2019

An enhanced time-to-digital conversion solution for pre-bond TSV dual faults testing.

Tianming Ni, Hao Chang, Xian Sun, Xia Xiuzhen, Zhengfeng Huang

IEICE Electron. Express, 2019

Novel Quadruple Cross-Coupled Memory Cell Designs With Protection Against Single Event Upsets and Double-Node Upsets.

Aibin Yan, Jun Zhou, Yuanjie Hu, Jie Cui, Zhengfeng Huang, Patrick Girard, Xiaoqing Wen

IEEE Access, 2019

Temperature-Aware Floorplanning for Fixed-Outline 3D ICs.

Tianming Ni, Hao Chang, Shidong Zhu, Lin Lu, Xueyun Li, Qi Xu, Huaguo Liang, Zhengfeng Huang

IEEE Access, 2019

A Novel Built-In Self-Repair Scheme for 3D Memory.

Tianming Ni, Hao Chang, Yao Yao, Xueyun Li, Zhengfeng Huang

IEEE Access, 2019

Timetable Coordination of the First Trains for Subway Network With Maximum Passenger Perceived Transfer Quality.

Xuan Li, Lili Lu, Pengjun Zheng, Zhengfeng Huang

IEEE Access, 2019

Novel Application of Deep Learning for Adaptive Testing Based on Long Short-Term Memory.

Tai Song, Huaguo Liang, Ying Sun, Zhengfeng Huang, Maoxiang Yi, Xiangsheng Fang, Aibin Yan

Proceedings of the 37th IEEE VLSI Test Symposium, 2019

A Novel Triple-Node-Upset-Tolerant CMOS Latch Design using Single-Node-Upset-Resilient Cells.

Zhiyuan Song, Aibin Yan, Jie Cui, Zhili Chen, Xuejun Li, Xiaoqing Wen, Chaoping Lai, Zhengfeng Huang, Huaguo Liang

Proceedings of the IEEE International Test Conference in Asia, 2019

2018

Design of Low-Power WiNoC with Congestion-Aware Wireless Node.

Yiming Ouyang, Zhe Li, Kun Xing, Zhengfeng Huang, Huaguo Liang, Jianhua Li

J. Circuits Syst. Comput., 2018

An improved communication scheme for non-HOL-blocking wireless NoC.

Yiming Ouyang, Jianfeng Yang, Kun Xing, Zhengfeng Huang, Huaguo Liang

Integr., 2018

Calibration of C-Logit-Based SUE Route Choice Model Using Mobile Phone Data.

Zhengfeng Huang, Zhaodong Huang, Pengjun Zheng, Wenjun Xu

Inf., 2018

Research on physical unclonable functions circuit based on three dimensional integrated circuit.

Tianming Ni, Hao Chang, Xiaoqiang Zhang, Hao Xiao, Zhengfeng Huang

IEICE Electron. Express, 2018

A novel in-field TSV repair method for latent faults.

Tianming Ni, Hao Chang, Haochen Qi, Zhengfeng Huang

IEICE Electron. Express, 2018

Radiation Hardening by Design of a Novel Double-Node-Upset-Tolerant Latch Combined with Layout Technique.

Aibin Yan, Zhile Chen, Zhengfeng Huang, Xiangsheng Fang, Maoxiang Yi, Jing Guo

Proceedings of the IEEE International Test Conference in Asia, 2018

A High Reliability FPGA Chip Identification Generator Based on PDLs.

Kai Zhou, Huaguo Liang, Yue Jiang, Zhengfeng Huang, Maoxiang Yi, Xiumin Xu, Yao Yao

Proceedings of the 27th IEEE Asian Test Symposium, 2018

An All-Digital and Jitter-Quantizing True Random Number Generator in SRAM-Based FPGAs.

Xiumin Xu, Huaguo Liang, Kai Zhou, Gaoliang Ma, Zhengfeng Huang, Maoxiang Yi, Tianming Ni, Yingchun Lu

Proceedings of the 27th IEEE Asian Test Symposium, 2018

A Low-Cost High-Efficiency True Random Number Generator on FPGAs.

Gaoliang Ma, Huaguo Liang, Liang Yao, Zhengfeng Huang, Maoxiang Yi, Xiumin Xu, Kai Zhou

Proceedings of the 27th IEEE Asian Test Symposium, 2018

A Hybrid DMR Latch to Tolerate MNU Using TDICE and WDICE.

Zhengfeng Huang, Yangyang Zhang, Zian Su, Huaguo Liang, Huijie Yao, Tianming Ni

Proceedings of the 27th IEEE Asian Test Symposium, 2018

2017

Double-Node-Upset-Resilient Latch Design for Nanoscale CMOS Technology.

Aibin Yan, Zhengfeng Huang, Maoxiang Yi, Xiumin Xu, Yiming Ouyang, Huaguo Liang

IEEE Trans. Very Large Scale Integr. Syst., 2017

Single event double-upset fully immune and transient pulse filterable latch design for nanoscale CMOS.

Aibin Yan, Zhengfeng Huang, Xiangsheng Fang, Yiming Ouyang, Honghui Deng

Microelectron. J., 2017

A Region-Based Through-Silicon via Repair Method for Clustered Faults.

Tianming Ni, Huaguo Liang, Mu Nie, Xiumin Xu, Aibin Yan, Zhengfeng Huang

IEICE Trans. Electron., 2017

Highly Robust Double Node Upset Resilient Hardened Latch Design.

Huaguo Liang, Xin Li, Zhengfeng Huang, Aibin Yan, Xiumin Xu

IEICE Trans. Electron., 2017

A transient pulse dually filterable and online self-recoverable latch.

Aibin Yan, Huaguo Liang, Yingchun Lu, Zhengfeng Huang

IEICE Electron. Express, 2017

A highly reliable butterfly PUF in SRAM-based FPGAs.

Xiumin Xu, Huaguo Liang, Zhengfeng Huang, Cuiyun Jiang, Yiming Ouyang, Xiangsheng Fang, Tianming Ni, Maoxiang Yi

IEICE Electron. Express, 2017

A single event transient detector in SRAM-based FPGAs.

Xiumin Xu, Huaguo Liang, Zhengfeng Huang, Cuiyun Jiang, Yingchun Lu, Aibin Yan, Tianming Ni, Maoxiang Yi

IEICE Electron. Express, 2017

Vernier ring based pre-bond through silicon vias test in 3D ICs.

Tianming Ni, Mu Nie, Huaguo Liang, Jingchang Bian, Xiumin Xu, Xiangsheng Fang, Zhengfeng Huang, Xiaoqing Wen

IEICE Electron. Express, 2017

HLDTL: High-performance, low-cost, and double node upset tolerant latch design.

Aibin Yan, Zhengfeng Huang, Maoxiang Yi, Jie Cui, Huaguo Liang

Proceedings of the 35th IEEE VLSI Test Symposium, 2017

2016

An SEU resilient, SET filterable and cost effective latch in presence of PVT variations.

Aibin Yan, Huaguo Liang, Zhengfeng Huang, Cuiyun Jiang, Yiming Ouyang, Xuejun Li

Microelectron. Reliab., 2016

Proactive Control for Oversaturation Mitigation on Evacuation Network: a Multi-Agent Simulation Approach.

Zhengfeng Huang, Pengjun Zheng, Yanqiang Ma, Guiyan Jiang, Gang Ren

Int. J. Comput. Intell. Syst., 2016

Co-mitigating circuit PBTI and HCI aging considering NMOS transistor stacking effect.

Maoxiang Yi, Yingxian Gan, Zhengfeng Huang, Huaguo Liang

Proceedings of the International Symposium on Integrated Circuits, 2016

NBTI mitigation by M-IVC with input duty cycle and randomness constraints.

Maoxiang Yi, Xiaohong Liu, Qingwu Wu, Tianming Ni, Zhengfeng Huang, Huaguo Liang

Proceedings of the 2016 IEEE East-West Design & Test Symposium, 2016

Novel Low Cost and Double Node Upset Tolerant Latch Design for Nanoscale CMOS Technology.

Aibin Yan, Zhengfeng Huang, Xiangsheng Fang, Xiaolin Xu, Huaguo Liang

Proceedings of the 25th IEEE Asian Test Symposium, 2016

2015

Method of generating strategic guidance information for driving evacuation flows to approach safety-based system optimal dynamic flows: Case study of a large stadium.

Gang Ren, Zhengfeng Huang, Lili Lu, Jingyi Hua, Jinghui Wang

J. Syst. Sci. Complex., 2015

A Self-Recoverable, Frequency-Aware and Cost-Effective Robust Latch Design for Nanoscale CMOS Technology.

Aibin Yan, Huaguo Liang, Zhengfeng Huang, Cuiyun Jiang, Maoxiang Yi

IEICE Trans. Electron., 2015

A High Performance SEU Tolerant Latch.

Zhengfeng Huang, Huaguo Liang, Sybille Hellebrand

J. Electron. Test., 2015

MTTF-Aware Reliability Task Scheduling for Heterogeneous Multicore System.

Huaguo Liang, Yangyang Dai, Maoxiang Yi, Dawen Xu, Zhengfeng Huang

Proceedings of the Algorithms and Architectures for Parallel Processing, 2015

2014

A high performance SEU-tolerant latch for nanoscale CMOS technology.

Zhengfeng Huang

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

Design of a Radiation Hardened Latch for Low-Power Circuits.

Huaguo Liang, Zhi Wang, Zhengfeng Huang, Aibin Yan

Proceedings of the 23rd IEEE Asian Test Symposium, 2014

2013

The Optimal Taxi Fleet Size Structure under Various Market Regimes When Charging Taxis with Link-Based Toll.

Jincheng Zhu, Bin Shuai, Zhengfeng Huang, Chaoyuan Sun

J. Appl. Math., 2013

A dynamic self-adaptive correction method for error resilient application.

Luming Yan, Huaguo Liang, Zhengfeng Huang

Proceedings of the Design, Automation and Test in Europe, 2013

2010

A scheme of test data compression based on coding of even bits marking and selective output inversion.

Wenfa Zhan, Huaguo Liang, Cuiyun Jiang, Zhengfeng Huang, Aiman H. El-Maleh

Comput. Electr. Eng., 2010

2008

Balancing wrapper chains of SoC core based on best interchange decreasing.

Maoxiang Yi, Huaguo Liang, Zhengfeng Huang

Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2008

A New Radiation Hardened by Design Latch for Ultra-Deep-Sub-Micron Technologies.

Zhengfeng Huang, Huaguo Liang

Proceedings of the 14th IEEE International On-Line Testing Symposium (IOLTS 2008), 2008

2007

Test data compression scheme based on variable-to-fixed-plus-variable-length coding.

Wenfa Zhan, Huaguo Liang, Feng Shi, Zhengfeng Huang

J. Syst. Archit., 2007

A Novel Collaborative Scheme of Test Data Compression Based on Fixed-Plus-variable-Length Coding.

Wenfa Zhan, Huaguo Liang, Feng Shi, Zhengfeng Huang

Proceedings of the 11th International Conference on Computer Supported Cooperative Work in Design, 2007

2005

A New Algorithm for Reducing Communication Cost of Time-dependent Monte Carlo Transport.

Li Deng, Wenyong Zhang, Haiyan Xu, Ruihong Wang, Zhengfeng Huang, Shu Li

Proceedings of the IASTED International Conference on Parallel and Distributed Computing and Networks, 2005

2004

Application of MPI-IO in Parallel Particle Transport Monte-Carlo Simulation.

Zeyao Mo, Zhengfeng Huang

Parallel Algorithms Appl., 2004

2003

The Parallel Communication of Time-Dependent Monte Carlo Transport.

Li Deng, Jie Liu, Wenyong Zhang, Guoxing Yuan, Zhengfeng Huang, Haiyan Xu, Ruihong Wang, Shu Li

Proceedings of the 32nd International Conference on Parallel Processing Workshops (ICPP 2003 Workshops), 2003