Zhengbin Pang

Orcid: 0000-0003-2046-5043

According to our database1, Zhengbin Pang authored at least 57 papers between 2007 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2024
Credit assignment for trained neural networks based on Koopman operator theory.
Frontiers Comput. Sci., February, 2024

Frequency Domain Modeling and Performance Analysis of Injection-Locked LC Oscillator.
IEEE Trans. Circuits Syst. II Express Briefs, January, 2024

Joint Spatial-Spectral Optimization for the High-Magnification Fusion of Hyperspectral and Multispectral Images.
IEEE Trans. Geosci. Remote. Sens., 2024

A low jitter and low reference spur 5GHz PLL with quadrature charge-sampling PD in 28nm CMOS process.
IEICE Electron. Express, 2024

Enhanced Causal Reasoning and Graph Networks for Multi-agent Path Finding.
Proceedings of the International Joint Conference on Neural Networks, 2024

Heuristic Action-aware and Priority Communication for Multi-agent Path Finding.
Proceedings of the IEEE International Conference on Multimedia and Expo, 2024

FPGA Implementation of Sequence Detector for High-Speed PAM4 Wireline Transceiver.
Proceedings of the Great Lakes Symposium on VLSI 2024, 2024

Learning Cross-modal Knowledge Reasoning and Heuristic-prompt for Visual-language Navigation.
Proceedings of the 33rd ACM International Conference on Information and Knowledge Management, 2024

2023
A Review of the Application of Multi-modal Deep Learning in Medicine: Bibliometrics and Future Directions.
Int. J. Comput. Intell. Syst., December, 2023

Towards robust neural networks via a global and monotonically decreasing robustness training strategy.
Frontiers Inf. Technol. Electron. Eng., October, 2023

Predicting gene regulatory links from single-cell RNA-seq data using graph neural networks.
Briefings Bioinform., September, 2023

Gene Regulatory Network Inference Using Convolutional Neural Networks from scRNA-seq Data.
J. Comput. Biol., May, 2023

GGN: a model-free, data-driven deep learning framework for reconstructing gene regulatory networks.
Proceedings of the 13th International Conference on Bioscience, 2023

2022
Reconstructing gene regulatory networks of biological function using differential equations of multilayer perceptrons.
BMC Bioinform., 2022

Fast-Converging Congestion Control in Datacenter Networks.
Proceedings of the IEEE Symposium on Computers and Communications, 2022

STEGNN: Spatial-Temporal Embedding Graph Neural Networks for Road Network Forecasting.
Proceedings of the 28th IEEE International Conference on Parallel and Distributed Systems, 2022

A neuro-genetic approach for inferring gene regulatory networks from gene expression data.
Proceedings of the 9th International Conference on Bioinformatics Research and Applications, 2022

DNNEmu: A Lightweight Performance Emulator for Distributed DNN Training.
Proceedings of the Algorithms and Architectures for Parallel Processing, 2022

ERA: ECN-Ratio-Based Congestion Control in Datacenter Networks.
Proceedings of the 22nd IEEE International Symposium on Cluster, 2022

2021
Dual Properties of Polyvinyl Alcohol-Based Magnetorheological Plastomer with Different Ratio of DMSO/Water.
Sensors, 2021

NEPG: Partitioning Large-Scale Power-Law Graphs.
Proceedings of the Algorithms and Architectures for Parallel Processing, 2021

An Adaptive Equalization Algorithm for High Speed SerDes.
Proceedings of the 14th IEEE International Conference on ASIC, 2021

A 5-156.25Gb/s high pin efficiency Receiver Based on CNRZ-5 for USR High-Speed Interface.
Proceedings of the 14th IEEE International Conference on ASIC, 2021

2020
A 32 Gb/s Low Power Little Area Re-timer with PI Based CDR in 65 nm CMOS Technology.
Proceedings of the Advanced Computer Architecture - 13th Conference, 2020

Optimal Implementation of In-Band Network Management for High-Radix Switches.
Proceedings of the Advanced Computer Architecture - 13th Conference, 2020

2019
Efficient Management and Intelligent Fault Tolerance for HPC Interconnect Networks.
Proceedings of the 25th IEEE International Conference on Parallel and Distributed Systems, 2019

2018
Integrated High-Speed Optical SerDes over 100GBd Based on Optical Time Division Multiplexing.
ACM J. Emerg. Technol. Comput. Syst., 2018

RSON: An inter/intra-chip silicon photonic network for rack-scale computing systems.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017
MOCA: an Inter/Intra-Chip Optical Network for Memory.
Proceedings of the 54th Annual Design Automation Conference, 2017

2016
An Area-Efficient DAMQ Buffer with Congestion Control Support.
J. Circuits Syst. Comput., 2016

The Efficient In-band Management for Interconnect Network in Tianhe-2 System.
Proceedings of the 24th Euromicro International Conference on Parallel, 2016

2015
High Performance Interconnect Network for Tianhe System.
J. Comput. Sci. Technol., 2015

A low-latency fine-grained dynamic shared cache management scheme for chip multi-processor.
Proceedings of the 34th IEEE International Performance Computing and Communications Conference, 2015

2014
An incentive compatible reputation mechanism for P2P systems.
J. Supercomput., 2014

The TH Express high performance interconnect networks.
Frontiers Comput. Sci., 2014

Selective Extension of Routing Algorithms Based on Turn Model.
Proceedings of the 22nd Euromicro International Conference on Parallel, 2014

Low-latency last-level cache structure based on grouped cores in Chip Multi-Processor.
Proceedings of the IEEE 33rd International Performance Computing and Communications Conference, 2014

A Low Overhead Last-Write-Touch Prediction Scheme.
Proceedings of the IEEE 12th International Conference on Dependable, 2014

Fast NIC based RDMA implementation for adaptive unreliable networks.
Proceedings of the 11th IEEE/ACS International Conference on Computer Systems and Applications, 2014

2013
Fine-Grained Location-Free Planarization in Wireless Sensor Networks.
IEEE Trans. Mob. Comput., 2013

An Effective Framework of Program Optimization for High Performance Computing.
Proceedings of the Computer Engineering and Technology - 17th CCF Conference, 2013

A Highly-Efficient Approach to Adaptive Load Balance for Scalable TBGP.
Proceedings of the Computer Engineering and Technology - 17th CCF Conference, 2013

Combining Program Analysis and Empirical Search to Optimize Programs.
Proceedings of the 10th IEEE International Conference on High Performance Computing and Communications & 2013 IEEE International Conference on Embedded and Ubiquitous Computing, 2013

Scalable NIC Architecture to Support Offloading of Large Scale MPI Barrier.
Proceedings of the Advanced Parallel Processing Technologies, 2013

2012
Inferring Assertion for Complementary Synthesis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012

Adaptive Bubble Scheme with Minimal Buffers in Torus Networks.
Proceedings of the 14th IEEE International Conference on High Performance Computing and Communication & 9th IEEE International Conference on Embedded Software and Systems, 2012

Optimizing Private Memory Performance by Dynamically Deactivating Cache Coherence.
Proceedings of the 14th IEEE International Conference on High Performance Computing and Communication & 9th IEEE International Conference on Embedded Software and Systems, 2012

PIM: A Policy-Based Incentive Mechanism for Promoting Honest Recommendations in Reputation Systems.
Proceedings of the 12th IEEE International Conference on Computer and Information Technology, 2012

2011
Finding First-Order Minimal Unsatisfiable Cores with a Heuristic Depth-First-Search Algorithm.
Proceedings of the Intelligent Data Engineering and Automated Learning - IDEAL 2011, 2011

A Parallel Processing Scheme for Large-Size Sliding-Window Applications.
Proceedings of the 13th IEEE International Conference on High Performance Computing & Communication, 2011

2009
A Reconfigurable Architecture for Rotation Invariant Multi-View Face Detection Based on a Novel Two-Stage Boosting Method.
EURASIP J. Adv. Signal Process., 2009

DTM: Decoupled Hardware Transactional Memory to Support Unbounded Transaction and Operating System.
Proceedings of the ICPP 2009, 2009

2008
Lowering the Overhead of Hybrid Transactional Memory with Transact Cache.
Proceedings of the 9th International Conference for Young Computer Scientists, 2008

Efficient Verification of Parameterized Cache Coherence Protocols.
Proceedings of the 9th International Conference for Young Computer Scientists, 2008

A GPDMA-based Distributed Shared I/O Solution for CC-NUMA System.
Proceedings of the 9th International Conference for Young Computer Scientists, 2008

Software Assisted Transact Cache to Support Efficient Unbounded Transactional Memory.
Proceedings of the 10th IEEE International Conference on High Performance Computing and Communications, 2008

2007
Exploring Data Reusing of Failed Transaction.
Proceedings of the Advanced Parallel Processing Technologies, 7th International Symposium, 2007


  Loading...