Zheng Qiu

According to our database, Zheng Qiu authored at least 11 papers between 2014 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2025

Power-efficient SAR ADC with noise-reduction scheme based on kT/C noise cancellation and adaptive tracking averaging.

Anji Huang, Gefeng Zeng, Yi Shen, Angyang Li, Libo Qian, Qing Zou, Zheng Qiu, Min Wang, Shubin Liu, Ruixue Ding, Yinshui Xia, Zhangming Zhu

Microelectron. J., 2025

2024

Development and validation of an interpretable machine learning for mortality prediction in patients with sepsis.

Bihua He, Zheng Qiu

Frontiers Artif. Intell., 2024

MR-Conditional Robotic Actuation of Concentric Tendon-Driven Cardiac Catheters.

Yifan Wang, Zheng Qiu, Junichi Tokuda, Ehud J. Schmidt, Aravindan Kolandaivelu, Yue Chen

Proceedings of the International Symposium on Medical Robotics, 2024

Transformer-Based Virtual Microphone Estimator.

Zheng Qiu, Jiachen Wang, Bo He, Shiqi Zhang, Shoji Makino

Proceedings of the IEEE International Conference on Signal Processing, 2024

Unrestricted Global Phase Bias-Aware Single-Channel Speech Enhancement with Conformer-Based Metric Gan.

Shiqi Zhang, Zheng Qiu, Daiki Takeuchi, Noboru Harada, Shoji Makino

Proceedings of the IEEE International Conference on Acoustics, 2024

Light Gated Multi Mini-Patch Extractor for Audio Classification.

Bo He, Shiqi Zhang, Xianrui Wang, Zheng Qiu, Daiki Takeuchi, Daisuke Niizumi, Noboru Harada, Shoji Makino

Proceedings of the IEEE International Conference on Acoustics, 2024

2023

An offset and gain error calibration method in high-precision SAR ADCs.

Junyan Hao, Yi Shen, Angyang Li, Min Wang, Qing Zou, Zheng Qiu, Shubin Liu, Zhangming Zhu

Microelectron. J., September, 2023

2021

A 1 GS/s 10bit SAR ADC with background calibration in 28 nm CMOS.

Zheng Qiu, Yudong Ouyang, Lijie Yang, Liqi Sun

Microelectron. J., 2021

2020

Dual Vote Confirmation based Consensus Design for Blockchain integrated IoT.

Zheng Qiu, Jianjun Hao, Yijun Guo, Yi Zhang

Proceedings of the NOMS 2020, 2020

2015

A 6-to-10-Bit 0.5 V-to-0.9 V Reconfigurable 2 MS/s Power Scalable SAR ADC in 0.18 µm CMOS.

Zhangming Zhu, Zheng Qiu, Maliang Liu, Ruixue Ding

IEEE Trans. Circuits Syst. I Regul. Pap., 2015

2014

A 2.67 fJ/c.-s. 27.8 kS/s 0.35 V 10-bit successive approximation register analogue-to-digital converter in 65 nm complementary metal oxide semiconductor.

Zhangming Zhu, Zheng Qiu, Yi Shen, Yintang Yang

IET Circuits Devices Syst., 2014