Zheming Jin

Orcid: 0000-0002-8129-9029

According to our database1, Zheming Jin authored at least 63 papers between 2013 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Extending the SYCL Joint Matrix for Binarized Neural Networks.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2024

2023
Small-Signal Synchronization Stability of Grid-Forming Converters With Regulated DC-Link Dynamics.
IEEE Trans. Ind. Electron., 2023

Exploring Damping Effect of Inner Control Loops for Grid-Forming VSCs.
CoRR, 2023

Experience Migrating OpenCL to SYCL: A Case Study on Searches for Potential Off-Target Sites of Cas9 RNA-Guided Endonucleases on AMD GPUs.
Proceedings of the 36th IEEE International System-on-Chip Conference, 2023

A Benchmark Suite for Improving Performance Portability of the SYCL Programming Model.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2023

Understanding Performance Portability of SYCL Kernels: A Case Study with the All-Pairs Distance Calculation in Bioinformatics on GPUs.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2023

Understanding SYCL Portability for Pseudorandom Number Generation: a Case Study with Gene-Expression Connectivity Mapping.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2023

Experience Deploying Graph Applications on GPUs with SYCL.
Proceedings of the 52nd International Conference on Parallel Processing Workshops, 2023

Understanding Portability of Automotive Workload: A Case Study with the Points-to-Image Kernel in SYCL on Heterogeneous Computing Platforms.
Proceedings of the 15th Workshop on General Purpose Processing Using GPU, 2023

Accelerating Hyperdimensional Classifier with SYCL.
Proceedings of the IEEE International Conference on Cluster Computing, 2023

2022
A Weighted Classification Method Based on Adaptive Feature Selection.
IEEE Access, 2022

Evaluating Nonuniform Reduction in HIP and SYCL on GPUs.
Proceedings of the 8th IEEE/ACM International Workshop on Data Analysis and Reduction for Big Scientific Data, 2022

Evaluating Unified Memory Performance in HIP.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2022

Integer Sum Reduction with OpenMP on an AMD MI100 GPU.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2022

A Study on Atomics-based Integer Sum Reduction in HIP on AMD GPU.
Proceedings of the Workshop Proceedings of the 51st International Conference on Parallel Processing, 2022

Understanding Performance Portability of Bioinformatics Applications in SYCL on an NVIDIA GPU.
Proceedings of the IEEE International Conference on Bioinformatics and Biomedicine, 2022

Performance portability study of epistasis detection using SYCL on NVIDIA GPU.
Proceedings of the BCB '22: 13th ACM International Conference on Bioinformatics, Computational Biology and Health Informatics, Northbrook, Illinois, USA, August 7, 2022

2021
Toward Evaluating High-Level Synthesis Portability and Performance between Intel and Xilinx FPGAs.
Proceedings of the IWOCL'21: International Workshop on OpenCL, Munich Germany, April, 2021, 2021

Evaluating the Performance of Integer Sum Reduction on an Intel GPU.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium Workshops, 2021

Evaluating CUDA Portability with HIPCL and DPCT.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium Workshops, 2021

Evaluating the Performance of Integer Sum Reduction in SYCL on GPUs.
Proceedings of the ICPP Workshops 2021: 50th International Conference on Parallel Processing, 2021

2020
Performance Evaluation of the Vectorizable Binary Search Algorithms on an FPGA Platform.
Proceedings of the 10th IEEE/ACM Workshop on Irregular Applications: Architectures and Algorithms, 2020

A Case Study on the HACCmk Routine in SYCL on Integrated Graphics.
Proceedings of the 2020 IEEE International Parallel and Distributed Processing Symposium Workshops, 2020

Analyzing Deep Learning Model Inferences for Image Classification using OpenVINO.
Proceedings of the 2020 IEEE International Parallel and Distributed Processing Symposium Workshops, 2020

Population Count on Intel® CPU, GPU and FPGA.
Proceedings of the 2020 IEEE International Parallel and Distributed Processing Symposium Workshops, 2020

2019
Exploring Integer Sum Reduction using Atomics on Intel CPU.
Proceedings of the International Workshop on OpenCL, 2019

Performance of Floating-point Intensive Kernels on Low-power Processor - A Case Study with Geodesic Distance Kernel.
Proceedings of the Tenth International Green and Sustainable Computing Conference, 2019

Nuclear Reactor Simulations on OpenCL FPGA Platform.
Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019

Base64 Encoding on OpenCL FPGA Platform.
Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019

OpenCL Kernel Vectorization on the CPU, GPU, and FPGA: A Case Study with Frequent Pattern Compression.
Proceedings of the 27th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2019

Exploring the Random Network of Hodgkin and Huxley Neurons with Exponential Synaptic Conductances on OpenCL FPGA Platform.
Proceedings of the 27th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2019

Accelerating Hyperdimensional Classifier on Multiple GPUs.
Proceedings of the 2019 IEEE International Conference on Cluster Computing, 2019

A Case Study of k-means Clustering using SYCL.
Proceedings of the 2019 IEEE International Conference on Big Data (IEEE BigData), 2019

Exploration of OpenCL 2D Convolution Kernels on Intel FPGA, CPU, and GPU Platforms.
Proceedings of the 2019 IEEE International Conference on Big Data (IEEE BigData), 2019

Evaluation of Medical Imaging Applications using SYCL.
Proceedings of the 2019 IEEE International Conference on Bioinformatics and Biomedicine, 2019

Simulation of Random Network of Hodgkin and Huxley Neurons with Exponential Synaptic Conductances on an FPGA Platform.
Proceedings of the 10th ACM International Conference on Bioinformatics, 2019

Base64 Encoding on Heterogeneous Computing Platforms.
Proceedings of the 30th IEEE International Conference on Application-specific Systems, 2019

Evaluating LULESH Kernels on OpenCL FPGA.
Proceedings of the Applied Reconfigurable Computing - 15th International Symposium, 2019

2018
Hierarchical Control Design for a Shipboard Power System With DC Distribution and Energy Storage Aboard Future More-Electric Ships.
IEEE Trans. Ind. Informatics, 2018

Evaluating Floating-point Intensive Applications on OpenCL FPGA Platforms: A Case Study on the SimpleMOC Kernel.
Proceedings of the 2018 International Conference on ReConFigurable Computing and FPGAs, 2018

Evaluating and Optimizing OpenCL Base64 Data Unpacking Kernel with FPGA.
Proceedings of the 26th Euromicro International Conference on Parallel, 2018

Nuclear Reactor Simulation on OpenCL FPGA: a Case Study of RSBench.
Proceedings of the International Workshop on OpenCL, 2018

Performance-oriented Optimizations for OpenCL Streaming Kernels on the FPGA.
Proceedings of the International Workshop on OpenCL, 2018

Evaluation of MD5Hash Kernel on OpenCL FPGA Platform.
Proceedings of the 2018 IEEE International Parallel and Distributed Processing Symposium Workshops, 2018

Power and Performance Tradeoff of a Floating-Point Intensive Kernel on OpenCL FPGA Platform.
Proceedings of the 2018 IEEE International Parallel and Distributed Processing Symposium Workshops, 2018

Optimizing an Atomics-Based Reduction Kernel on OpenCL FPGA Platform.
Proceedings of the 2018 IEEE International Parallel and Distributed Processing Symposium Workshops, 2018

Optimizing Parallel Reduction on OpenCL FPGA Platform - A Case Study of Frequent Pattern Compression.
Proceedings of the 2018 IEEE International Parallel and Distributed Processing Symposium Workshops, 2018

Evaluating an OpenCL FPGA Platform for HPC: a Case Study with the HACCmk Kernel.
Proceedings of the 2018 IEEE High Performance Extreme Computing Conference, 2018

A Case Study of Integer Sum Reduction using Atomics.
Proceedings of the 9th International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies, 2018

Evaluating Radial Basis Function Kernel on OpenCL FPGA Platform.
Proceedings of the Ninth International Green and Sustainable Computing Conference, 2018

A Case Study of Complementary-multiply-with-carry Method on OpenCL FPGA.
Proceedings of the Ninth International Green and Sustainable Computing Conference, 2018

Optimizations of Sequence Alignment on FPGA: A Case Study of Extended Sequence Alignment (Abstact Only).
Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2018

Evaluation of OpenCL Performance-oriented Optimizations for Streaming Kernels on the FPGA: (Abstract Only).
Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2018

Bob Jenkins Lookup3 Hash Function on OpenCL FPGA Platform.
Proceedings of the IEEE International Conference on Big Data (IEEE BigData 2018), 2018

Optimizing Radial Basis Function Kernel on OpenCL FPGA Platform.
Proceedings of the IEEE International Conference on Big Data (IEEE BigData 2018), 2018

2017
Specialized hierarchical control strategy for DC distribution based shipboard microgrids: A combination of emerging DC shipboard power systems and microgrid technologies.
Proceedings of the IECON 2017 - 43rd Annual Conference of the IEEE Industrial Electronics Society, Beijing, China, October 29, 2017

Constant power load instability mitigation in DC shipboard power systems using negative series virtual inductor method.
Proceedings of the IECON 2017 - 43rd Annual Conference of the IEEE Industrial Electronics Society, Beijing, China, October 29, 2017

Evaluation of a Floating-Point Intensive Kernel on FPGA - A Case Study of Geodesic Distance Kernel.
Proceedings of the Euro-Par 2017: Parallel Processing Workshops, 2017

2015
Memory Interface Design for 3D Stencil Kernels on a Massively Parallel Memory System.
ACM Trans. Reconfigurable Technol. Syst., 2015

2013
An FPGA-Based Accelerator for Frequent Itemset Mining.
ACM Trans. Reconfigurable Technol. Syst., 2013

A Heuristic Scheduler for Port-Constrained Floating-Point Pipelines.
Int. J. Reconfigurable Comput., 2013

Extending the BEAGLE library to a multi-FPGA platform.
BMC Bioinform., 2013

Memory Access Scheduling on the Convey HC-1.
Proceedings of the 21st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2013


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