Zhejun Zhang

Orcid: 0000-0002-8785-4644

According to our database1, Zhejun Zhang authored at least 12 papers between 2011 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
Spiking Neural Network Based on Memory Capacitors and Metal-Oxide Thin-Film Transistors.
IEEE Trans. Circuits Syst. II Express Briefs, August, 2024

Neural Policies for Prosocial Navigation.
PhD thesis, 2024

TrafficBots V1.5: Traffic Simulation via Conditional VAEs and Transformers with Relative Pose Encoding.
CoRR, 2024

Executing realistic earthquake simulations in unreal engine with material calibration.
Comput. Graph., 2024

2023
Real-Time Motion Prediction via Heterogeneous Polyline Transformer with Relative Pose Encoding.
Proceedings of the Advances in Neural Information Processing Systems 36: Annual Conference on Neural Information Processing Systems 2023, 2023

A Multiplicative Value Function for Safe and Efficient Reinforcement Learning.
IROS, 2023

RESenv: A Realistic Earthquake Simulation Environment based on Unreal Engine.
Proceedings of the 3rd International Conference on Interactive Media, 2023

TrafficBots: Towards World Models for Autonomous Driving Simulation and Motion Prediction.
Proceedings of the IEEE International Conference on Robotics and Automation, 2023

As with Wine, Life Gets Better with Age. Redefining Mobile User Interface (UI) Components in the Age-Friendly Design Transformation.
Proceedings of the Cross-Cultural Design, 2023

2022
Envisioning the Future Trends of Smart Assistive Devices to Support Activities of Daily Living for Older Adults with Disabilities.
Proceedings of the Design, User Experience, and Usability: Design Thinking and Practice in Contemporary and Emerging Technologies, 2022

2021
End-to-End Urban Driving by Imitating a Reinforcement Learning Coach.
Proceedings of the 2021 IEEE/CVF International Conference on Computer Vision, 2021

2011
Memory efficient layered decoder design with early termination for LDPC codes.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011


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