Zhe Lin

Orcid: 0009-0002-1594-2335

Affiliations:
  • Hong Kong University of Science and Technology, Department of Electronic and Computer Engineering, Hong Kong


According to our database1, Zhe Lin authored at least 11 papers between 2017 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Data-Pattern-Based Predictive On-Chip Power Meter in DNN Accelerator.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., December, 2024

GraFlex: Flexible Graph Processing on FPGAs through Customized Scalable Interconnection Network.
Proceedings of the 2024 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2024

2023
HL-Pow: Learning-Assisted Pre-RTL Power Modeling and Optimization for FPGA HLS.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., November, 2023

2022
PowerGear: Early-Stage Power Estimation in FPGA HLS via Heterogeneous Edge-Centric GNNs.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

2021
Hard-ODT: Hardware-Friendly Online Decision Tree Learning Algorithm and System.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

PanGu-α: Large-scale Autoregressive Pretrained Chinese Language Models with Auto-parallel Computation.
CoRR, 2021

2020
HL-Pow: A Learning-Based Power Modeling Framework for High-Level Synthesis.
Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

2019
An Ensemble Learning Approach for In-Situ Monitoring of FPGA Dynamic Power.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

Towards Efficient and Scalable Acceleration of Online Decision Tree Learning on FPGA.
Proceedings of the 27th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2019

2018
Scalable Light-Weight Integration of FPGA Based Accelerators with Chip Multi-Processors.
IEEE Trans. Multi Scale Comput. Syst., 2018

2017
Decision tree based hardware power monitoring for run time dynamic power management in FPGA.
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017


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