Zhe Jiang

Orcid: 0000-0002-8509-3167

Affiliations:
  • University of York, UK


According to our database1, Zhe Jiang authored at least 45 papers between 2017 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2024
DECISIVE: Designing Critical Systems With Iterative Automated Safety Analysis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., May, 2024

Post-training quantization for re-parameterization via coarse & fine weight splitting.
J. Syst. Archit., February, 2024

Hopscotch: A Hardware-Software Co-Design for Efficient Cache Resizing on Multi-Core SoCs.
IEEE Trans. Parallel Distributed Syst., January, 2024

Automated Model-Based Assurance Case Management Using Constrained Natural Language.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., January, 2024

An efficient multi-task learning CNN for driver attention monitoring.
J. Syst. Archit., 2024

Towards an extensible model-based digital twin framework for space launch vehicles.
J. Ind. Inf. Integr., 2024

Location is Key: Leveraging Large Language Model for Functional Bug Localization in Verilog.
CoRR, 2024

MESC: Re-thinking Algorithmic Priority and/or Criticality Inversions for Heterogeneous MCSs.
CoRR, 2024

Hardware/Algorithm Co-design for Real-Time I/O Control with Improved Timing Accuracy and Robustness.
CoRR, 2024

Large Language Model for Verilog Generation with Golden Code Feedback.
CoRR, 2024

Optimization of NUMA Aware DNN Computing System.
Proceedings of the Advanced Intelligent Computing Technology and Applications, 2024

A Cache/Algorithm Co-design for Parallel Real-Time Systems with Data Dependency on Multi/Many-core System-on-Chips.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

Make Each Iteration Count.
Proceedings of the ACM Turing Award Celebration Conference 2024, 2024

2023
NPRC-I/O: An NoC-Based Real-Time I/O System With Reduced Contention and Enhanced Predictability.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., December, 2023

AXI-IC$^{\mathrm{ RT}}$ RT : Towards a Real-Time AXI-Interconnect for Highly Integrated SoCs.
IEEE Trans. Computers, March, 2023

Towards Hard Real-Time and Energy-Efficient Virtualization for Many-Core Embedded Systems.
IEEE Trans. Computers, 2023

A High-Resilience Imprecise Computing Architecture for Mixed-Criticality Systems.
IEEE Trans. Computers, 2023

BlueFace: Integrating an Accelerator into the Core's Pipeline through Algorithm-Interface Co-Design for Real-Time SoCs.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

Many-Core Real-Time Network-on-Chip I/O Systems for Reducing Contention and Enhancing Predictability.
Proceedings of Cyber-Physical Systems and Internet of Things Week 2023, 2023

2022
Bridging the Pragmatic Gaps for Mixed-Criticality Systems in the Automotive Industry.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Toward an Analysable, Scalable, Energy-Efficient I/O Virtualization for Mixed-Criticality Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

BlueVisor: Time-Predictable Hardware Hypervisor for Many-Core Embedded Systems.
IEEE Trans. Computers, 2022

Schedulability analysis and stack size minimization for adaptive mixed criticality scheduling with semi-Clairvoyance and preemption thresholds.
J. Syst. Archit., 2022

Towards an energy-efficient quarter-clairvoyant mixed-criticality system.
J. Syst. Archit., 2022

PSpSys: A time-predictable mixed-criticality system architecture based on ARM TrustZone.
J. Syst. Archit., 2022

Designing critical systems with iterative automated safety analysis.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

BlueScale: a scalable memory architecture for predictable real-time computing on highly integrated SoCs.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

2021
HIART-MCS: High Resilience and Approximated Computing Architecture for Imprecise Mixed-Criticality Systems.
Proceedings of the 42nd IEEE Real-Time Systems Symposium, 2021

Work-in-Progress: a static partition for shared cache in mixed-time-sensitive system with balanced performance.
Proceedings of the 27th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2021

Brief Industry Paper: AXI-Interconnect<sup>RT</sup>: Towards a Real-Time AXI-Interconnect for System-on-Chips.
Proceedings of the 27th IEEE Real-Time and Embedded Technology and Applications Symposium, 2021

Adaptable Ensemble Distillation.
Proceedings of the IEEE International Conference on Acoustics, 2021

I/O-GUARD: Hardware/Software Co-Design for I/O Virtualization with Guaranteed Real-time Performance.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

2020
Build real-time communication for hybrid dual-OS system.
J. Syst. Archit., 2020

Pythia-MCS: Enabling Quarter-Clairvoyance in I/O-Driven Mixed-Criticality Systems.
Proceedings of the 41st IEEE Real-Time Systems Symposium, 2020

Re-Thinking Mixed-Criticality Architecture for Automotive Industry.
Proceedings of the 38th IEEE International Conference on Computer Design, 2020

All In One Network for Driver Attention Monitoring.
Proceedings of the 2020 IEEE International Conference on Acoustics, 2020

Timing-Accurate General-Purpose I/O for Multi- and Many-Core Systems: Scheduling and Hardware Support.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2019
BlueIO: A Scalable Real-Time Hardware I/O Virtualization System for Many-core Embedded Systems.
ACM Trans. Embed. Comput. Syst., 2019

Work-in-Progress: Real-Time RPC for Hybrid Dual-OS System.
Proceedings of the IEEE Real-Time Systems Symposium, 2019

MCS-IOV: Real-Time I/O Virtualization for Mixed-Criticality Systems.
Proceedings of the IEEE Real-Time Systems Symposium, 2019

2018
Real-time I/O system for many-core embedded systems.
PhD thesis, 2018

TZDKS: A New TrustZone-Based Dual-Criticality System with Balanced Performance.
Proceedings of the 24th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2018

BlueVisor: A Scalable Real-Time Hardware Hypervisor for Many-Core Embedded Systems.
Proceedings of the IEEE Real-Time and Embedded Technology and Applications Symposium, 2018

2017
VCDC: The Virtualized Complicated Device Controller.
Proceedings of the 29th Euromicro Conference on Real-Time Systems, 2017

GPIOCP: Timing-accurate general purpose I/O controller for many-core real-time systems.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017


  Loading...