Zhaonan Lu

According to our database, Zhaonan Lu authored at least 4 papers between 2022 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

An 871nW 96.2dB-SNDR Pipelined NS SAR ADC Achieving 180.8dB-FoMSNDR with a Charge-Efficient CLS-Assisted Two-Stage FIA.

Shan Zhang, Lingxin Meng, Zhaonan Lu, Wanyuan Qu, Shuang Song, Menglian Zhao, Zhichao Tan

Proceedings of the IEEE Custom Integrated Circuits Conference, 2024

A 188.6-μW Continuous-time Incremental Delta-Sigma ADC with Extended Counting achieving 95.2-dB SNDR and 175.4-dB FoMSNDR.

Zhaonan Lu, Menglian Zhao, Zhichao Tan

Proceedings of the IEEE Custom Integrated Circuits Conference, 2024

2023

A 1 V 1.07 μW 15-Bit Pseudo-Pseudo-Differential Incremental Zoom ADC.

Zhaonan Lu, Huaikun Ji, Wanyuan Qu, Le Ye, Menglian Zhao, Zhichao Tan

IEEE J. Solid State Circuits, September, 2023

2022

A 10.12μW 101.98dB-SNDR Three-step Incremental Analog-to-Digital Converter.

Huaikun Ji, Zhenhao Fan, Zhaonan Lu, Zhichao Tan, Menglian Zhao

Proceedings of the 19th International SoC Design Conference, 2022