Zeyu Guo

Orcid: 0009-0000-7662-8476

Affiliations:
  • Institute of Microelectronics, Chinese Academy of Sciences, Beijing, China


According to our database1, Zeyu Guo authored at least 6 papers between 2022 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
A 41.7TOPS/W@INT8 Computing-in-Memory Processor with Zig-Zag Backbone-Systolic CIM and Block/Self-Gating CAM for NN/Recommendation Applications.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

IG-CRM: Area/Energy-Efficient IGZO-Based Circuits and Architecture Design for Reconfigurable CIM/CAM Applications.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

2023
An ADC-Less RRAM-Based Computing-in-Memory Macro With Binary CNN for Efficient Edge AI.
IEEE Trans. Circuits Syst. II Express Briefs, June, 2023

2022
Mixed-Precision Continual Learning Based on Computational Resistance Random Access Memory.
Adv. Intell. Syst., 2022

Few-shot graph learning with robust and energy-efficient memory-augmented graph neural network (MAGNN) based on homogeneous computing-in-memory.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

3D Reservoir Computing with High Area Efficiency (5.12 TOPS/mm<sup>2</sup>) Implemented by 3D Dynamic Memristor Array for Temporal Signal Processing.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022


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