Zexi Ji

According to our database, Zexi Ji authored at least 6 papers between 2017 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

A Fully-Integrated Energy-Scalable Transformer Accelerator Supporting Adaptive Model Configuration and Word Elimination for Language Understanding on Edge Devices.

Zexi Ji, Hanrui Wang, Miaorong Wang, Win-San Khwa, Meng-Fan Chang, Song Han, Anantha P. Chandrakasan

Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2023

2021

A 2.4-GHz 1.3-mW OQPSK RF Front-End TX Based on an Injection-Locked Power Amplifier.

Saba Zargham, Zexi Ji, Antonio Liscidini

IEEE J. Solid State Circuits, 2021

2020

CompAcc: Efficient Hardware Realization for Processing Compressed Neural Networks Using Accumulator Arrays.

Zexi Ji, Wanyeong Jung, Jongchan Woo, Khushal Sethi, Shih-Lien Lu, Anantha P. Chandrakasan

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2020

2018

Low-Power QPSK Transmitter Based on an Injection-Locked Power Amplifier.

Zexi Ji, Saba Zargham, Antonio Liscidini

Proceedings of the 44th IEEE European Solid State Circuits Conference, 2018

2017

A 9-GS/s 1.125-GHz BW Oversampling Continuous-Time Pipeline ADC Achieving -164-dBFS/Hz NSD.

Hajime Shibata, Victor Kozlov, Zexi Ji, Asha Ganesan, Haiyang Zhu, Donald Paterson, Jialin Zhao, Sharvil Patil, Shanthi Pavan

IEEE J. Solid State Circuits, 2017

16.2 A 9GS/s 1GHz-BW oversampled continuous-time pipeline ADC achieving -161dBFS/Hz NSD.

Hajime Shibata, Victor Kozlov, Zexi Ji, Asha Ganesan, Haiyang Zhu, Donald Paterson

Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017