Zdenek Pohl

According to our database, Zdenek Pohl authored at least 14 papers between 2002 and 2017.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2017

A Survey of Hardware Technologies for Mixed-Critical Integration Explored in the Project EMC^2.

Haris Isakovic, Radu Grosu, Denise Ratasich, Jiri Kadlec, Zdenek Pohl, Steve Kerrison, Kyriakos Georgiou, Kerstin Eder, Norbert Druml, Lillian Tadros, Flemming Christensen, Emilie Wheatley, Bastian Farkas, Rolf Meyer, Mladen Berekovic

Proceedings of the Computer Safety, Reliability, and Security, 2017

2011

A Framework for Self-adaptive Collaborative Computing on Reconfigurable Platforms.

Michiel W. van Tol, Zdenek Pohl, Milan Tichý

Proceedings of the Applications, Tools and Techniques on the Road to Exascale Computing, Proceedings of the conference ParCo 2011, 31 August, 2011

Resource Management for the Heterogeneous Arrays of Hardware Accelerators.

Zdenek Pohl, Milan Tichý

Proceedings of the International Conference on Field Programmable Logic and Applications, 2011

2008

The European Logarithmic Microprocesor.

John N. Coleman, Christopher I. Softley, Jiri Kadlec, Rudolf Matousek, Milan Tichý, Zdenek Pohl, Antonin Hermanek, Nico F. Benschop

IEEE Trans. Computers, 2008

Implementation of the Least-Squares Lattice with Order and Forgetting Factor Estimation for FPGA.

Zdenek Pohl, Milan Tichý, Jiri Kadlec

EURASIP J. Adv. Signal Process., 2008

2007

RLS Lattice Algorithm with Order Probability Evaluation as an Accelerator for the Microblaze Processor.

Zdenek Pohl, Milan Tichý

Proceedings of the FPL 2007, 2007

2005

Performance Tuning of Iterative Algorithms in Signal Processing.

Zdenek Pohl, Premysl Sucha, Jiri Kadlec, Zdenek Hanzálek

Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

Figaro - An Automatic Tool Flow for Designs with Dynamic Reconfiguration.

Kelly Nasi, Martin Danek, Theodoros Karoubalis, Zdenek Pohl

Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

Figaro: an automatic tool flow for designs with dynamic reconfiguration (abstract only).

Kelly Nasi, Martin Danek, Theodoros Karoubalis, Zdenek Pohl

Proceedings of the ACM/SIGDA 13th International Symposium on Field Programmable Gate Arrays, 2005

2004

Scheduling of Iterative Algorithms on FPGA with Pipelined Arithmetic Unit.

Premysl Sucha, Zdenek Pohl, Zdenek Hanzálek

Proceedings of the 10th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS 2004), 2004

2003

Logarithmic Arithmetic for Real Data Types and Support for Matlab/Simulink Based Rapid-FPGA-Prototyping.

Zdenek Pohl, Jan Schier, Miroslav Lícko, Antonin Hermanek, Milan Tichý, Rudolf Matousek, Jiri Kadlec

Proceedings of the 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 2003

FPGA Implementation of the Adpaptive Lattice Filter.

Antonin Hermanek, Zdenek Pohl, Jiri Kadlec

Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

Lattice adaptive filter implementation for FPGA.

Zdenek Pohl, Rudolf Matousek, Jiri Kadlec, Milan Tichý, Miroslav Lícko

Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2003

2002

Logarithmic Number System and Floating-Point Arithmetics on FPGA.

Rudolf Matousek, Milan Tichý, Zdenek Pohl, Jiri Kadlec, Christopher I. Softley, Nick Coleman

Proceedings of the Field-Programmable Logic and Applications, 2002