Zaifu Zhang

According to our database, Zaifu Zhang authored at least 7 papers between 1993 and 1996.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of four.

1996

Statistical estimation of delay fault detectabilities and fault grading.

Zaifu Zhang, Robert D. McLeod, Gregory E. Bridges

J. Electron. Test., 1996

An Efficient Multiple Scan Chain Testing Scheme.

Zaifu Zhang, Robert D. McLeod

Proceedings of the 6th Great Lakes Symposium on VLSI (GLS-VLSI '96), 1996

1995

Emulating static faults using a Xilinx based emulator.

Richard W. Wieler, Zaifu Zhang, Robert D. McLeod

Proceedings of the 3rd IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '95), 1995

1994

Using an FPGA based computer as a hardware emulator for built-in self-test structures.

Richard W. Wieler, Zaifu Zhang, Robert D. McLeod

Proceedings of IEEE 5th International Workshop on Rapid System Prototyping, 1994

Simulating Static and Dynamic Faults in BIST Strucutres with a FPGA Based Emulator.

Richard W. Wieler, Zaifu Zhang, Robert D. McLeod

Proceedings of the Field-Programmable Logic, 1994

Augmenting Scan Path SRLs with an XOR Network to Enhance Delay Fault Testing.

Zaifu Zhang, Robert D. McLeod, Witold Pedrycz

Proceedings of the IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems, 1994

1993

A neural network algorithm for testing stuck-open faults in CMOS combinational circuits.

Zaifu Zhang, Robert D. McLeod, Witold Pedrycz

J. Electron. Test., 1993