Zaid Al-bayati

Orcid: 0000-0003-3224-9938

According to our database1, Zaid Al-bayati authored at least 11 papers between 2012 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2019
Partitioning and Selection of Data Consistency Mechanisms for Multicore Real-Time Systems.
ACM Trans. Embed. Comput. Syst., 2019

2018
Mapping and Scheduling Mixed-Criticality Systems with On-Demand Redundancy.
IEEE Trans. Computers, 2018

2017
Optimized Implementation of Multirate Mixed-Criticality Synchronous Reactive Models.
ACM Trans. Design Autom. Electr. Syst., 2017

2016
Fault-tolerant scheduling of multicore mixed-criticality systems under permanent failures.
Proceedings of the 2016 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2016

A four-mode model for efficient fault-tolerant mixed-criticality systems.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2015
Task placement and selection of data consistency mechanisms for real-time multicore applications.
Proceedings of the 21st IEEE Real-Time and Embedded Technology and Applications Symposium, 2015

Enhanced partitioned scheduling of Mixed-Criticality Systems on multicore platforms.
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

2013
Multitask implementation of synchronous reactive models with Earliest Deadline First scheduling.
Proceedings of the 8th IEEE International Symposium on Industrial Embedded Systems, 2013

2012
Low power Wallace multiplier design based on wide counters.
Int. J. Circuit Theory Appl., 2012

Probabilistic model checking of clock domain crossing interfaces.
Proceedings of the 10th IEEE International NEWCAS Conference, 2012

A novel hybrid FIFO asynchronous clock domain crossing interfacing method.
Proceedings of the Great Lakes Symposium on VLSI 2012, 2012


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