Zahra Azad

According to our database, Zahra Azad authored at least 9 papers between 2017 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Bridging the Gap Between LLMs and LNS with Dynamic Data Format and Architecture Codesign.

Pouya Haghi, Chunshu Wu, Zahra Azad, Yanfei Li, Andrew Gui, Yuchen Hao, Ang Li, Tony Tong Geng

Proceedings of the 57th IEEE/ACM International Symposium on Microarchitecture, 2024

2023

RISE: RISC-V SoC for En/Decryption Acceleration on the Edge for Homomorphic Encryption.

Zahra Azad, Guowei Yang, Rashmi Agrawal, Daniel Petrisko, Michael Bedford Taylor, Ajay Joshi

IEEE Trans. Very Large Scale Integr. Syst., October, 2023

2022

RACE: RISC-V SoC for En/decryption Acceleration on the Edge for Homomorphic Computation.

Zahra Azad, Guowei Yang, Rashmi Agrawal, Daniel Petrisko, Michael B. Taylor, Ajay Joshi

Proceedings of the ISLPED '22: ACM/IEEE International Symposium on Low Power Electronics and Design, Boston, MA, USA, August 1, 2022

2021

AI Tax in Mobile SoCs: End-to-end Performance Analysis of Machine Learning in Smartphones.

Michael Buch, Zahra Azad, Ajay Joshi, Vijay Janapa Reddi

Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2021

Hardware Acceleration for DBMS Machine Learning Scoring: Is It Worth the Overheads?

Zahra Azad, Rathijit Sen, Kwanghyun Park, Ajay Joshi

Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2021

2020

BlackParrot: An Agile Open-Source RISC-V Multicore for Accelerator SoCs.

Daniel Petrisko, Farzam Gilani, Mark Wyse, Dai Cheol Jung, Scott Davidson, Paul Gao, Chun Zhao, Zahra Azad, Sadullah Canakci, Bandhav Veluri, Tavio Guarino, Ajay Joshi, Mark Oskin, Michael Bedford Taylor

IEEE Micro, 2020

2019

AWARE: Adaptive Way Allocation for Reconfigurable ECCs to Protect Write Errors in STT-RAM Caches.

Zahra Azad, Hamed Farbeh, Amir Mahdi Hosseini Monazzah, Seyed Ghassem Miremadi

IEEE Trans. Emerg. Top. Comput., 2019

2018

ORIENT: Organized interleaved ECCs for new STT-MRAM caches.

Zahra Azad, Hamed Farbeh, Amir Mahdi Hosseini Monazzah

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017

An Efficient Protection Technique for Last Level STT-RAM Caches in Multi-Core Processors.

Zahra Azad, Hamed Farbeh, Amir Mahdi Hosseini Monazzah, Seyed Ghassem Miremadi

IEEE Trans. Parallel Distributed Syst., 2017