Zahid Ullah

According to our database, Zahid Ullah authored at least 28 papers between 2012 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

Fast Linde-Buzo-Gray (FLBG) Algorithm for Image Compression through Rescaling Using Bilinear Interpolation.

Muhammad Bilal, Zahid Ullah, Omer Mujahid, Tama Fouzder

J. Imaging, May, 2024

2023

On Enhancing the Performance of IEEE 802.11ah by Employing a Dynamic Raw Approach in IoT Networks.

Fahad Malook, Omer Mujahid, Zahid Ullah, Tama Fouzder

Wirel. Pers. Commun., April, 2023

2022

Reconfigurable content-addressable memory (CAM) on FPGAs: A tutorial and survey.

Muhammad Irfan, Abdurrashid Ibrahim Sanka, Zahid Ullah, Ray C. C. Cheung

Future Gener. Comput. Syst., 2022

Comp-TCAM: An Adaptable Composite Ternary Content-Addressable Memory on FPGAs.

Muhammad Irfan, Hasan Erdem Yantir, Zahid Ullah, Ray C. C. Cheung

IEEE Embed. Syst. Lett., 2022

2021

PackeX: Low-Power High-Performance Packet Classifier Using Memory on FPGAs.

Khalid Rehman, Zahid Ullah

Wirel. Commun. Mob. Comput., 2021

Accelerated Updating Mechanisms for FPGA-Based Ternary Content-Addressable Memory.

Muhammad Irfan, Zahid Ullah, Abdurrashid Ibrahim Sanka, Ray C. C. Cheung

IEEE Embed. Syst. Lett., 2021

An FPGA-Based Accelerated Mutation Detection System for the Tumor Suppressor Gene.

Muhammad Ibrahim, Omer Mujahid, Najib Ur Rehman, Azhar Qazi, Zahid Ullah, Tama Fouzder

IEEE Access, 2021

Fast Codebook Generation Using Pattern Based Masking Algorithm for Image Compression.

Muhammad Bilal, Zahid Ullah, Ihtesham Ul Islam

IEEE Access, 2021

2020

RPE-TCAM: Reconfigurable Power-Efficient Ternary Content-Addressable Memory on FPGAs.

Muhammad Irfan, Zahid Ullah, Mehdi Hasan Chowdhury, Ray C. C. Cheung

IEEE Trans. Very Large Scale Integr. Syst., 2020

High Speed Partial Pattern Classification System Using a CAM-Based LBP Histogram on FPGA.

Omer Mujahid, Zahid Ullah

IEEE Embed. Syst. Lett., 2020

2019

DURE: An Energy- and Resource-Efficient TCAM Architecture for FPGAs With Dynamic Updates.

Inayat Ullah, Zahid Ullah, Umar Afzaal, Jeong-A Lee

IEEE Trans. Very Large Scale Integr. Syst., 2019

Beyond the Limits of Typical Strategies: Resources Efficient FPGA-Based TCAM.

Hassan Mahmood, Zahid Ullah, Omer Mujahid, Inayat Ullah, Abdul Hafeez

IEEE Embed. Syst. Lett., 2019

D-TCAM: A High-Performance Distributed RAM Based TCAM Architecture on FPGAs.

Muhammad Irfan, Zahid Ullah, Ray C. C. Cheung

IEEE Access, 2019

High Performance Power-Efficient Gate-Based CAM for Reconfigurable Computing.

Muhammad Irfan, Zahid Ullah, Ray C. C. Cheung

Proceedings of the 15th International Conference on Mobile Ad-Hoc and Sensor Networks, 2019

Design Exploration of LH-CAM with Updating Mechanism.

Omer Mujahid, Zahid Ullah, Abdul Hafeez, Tama Fouzder

Proceedings of International Joint Conference on Computational Intelligence, 2019

Low Power Pre-comparison Configuration Strategy for a Logic-based Binary CAM on FPGA.

Najib Ur Rehman, Omer Mujahid, Muhammad Irfan, Abdul Hafeez, Zahid Ullah

Proceedings of the Second International Conference on Latest trends in Electrical Engineering and Computing Technologies, 2019

Bank-selective Strategy for Gate-based Ternary Content-addressable Memory on FPGAs.

Muhammad Irfan, Ray C. C. Cheung, Zahid Ullah

Proceedings of the 30th IEEE International Conference on Application-specific Systems, 2019

2018

A Three-Dimensional Geometrical Scattering Model for Cellular Communication Environment.

Muhammad Riaz, Miraj M. Khan, Zahid Ullah

Wirel. Pers. Commun., 2018

Fast Content Updating Algorithm for an SRAM-Based TCAM on FPGA.

Farkhanda Syed, Zahid Ullah, Manish Kumar Jaiswal

IEEE Embed. Syst. Lett., 2018

Efficient TCAM Design Based on Multipumping-Enabled Multiported SRAM on FPGA.

Inayat Ullah, Zahid Ullah, Jeong-A Lee

IEEE Access, 2018

Fast Pattern Recognition Through an LBP Driven CAM on FPGA.

Omer Mujahid, Zahid Ullah, Hassan Mahmood, Abdul Hafeez

IEEE Access, 2018

High-Speed Configuration Strategy for Configurable Logic Block-Based TCAM Architecture on FPGA.

Inayat Ullah, Umar Afzaal, Zahid Ullah, Jeong-A Lee

Proceedings of the 21st Euromicro Conference on Digital System Design, 2018

2017

LH-CAM: Logic-Based Higher Performance Binary CAM Architecture on FPGA.

Zahid Ullah

IEEE Embed. Syst. Lett., 2017

G-AETCAM: Gate-Based Area-Efficient Ternary Content-Addressable Memory on FPGA.

Muhammad Irfan, Zahid Ullah

IEEE Access, 2017

2015

Z-TCAM: An SRAM-based Architecture for TCAM.

Zahid Ullah, Manish Kumar Jaiswal, Ray C. C. Cheung

IEEE Trans. Very Large Scale Integr. Syst., 2015

2014

E-TCAM: An Efficient SRAM-Based Architecture for TCAM.

Zahid Ullah, Manish Kumar Jaiswal, Ray C. C. Cheung

Circuits Syst. Signal Process., 2014

2013

Design space explorations of Hybrid-Partitioned TCAM (HP-TCAM).

Zahid Ullah, Manish Kumar Jaiswal, Ray C. C. Cheung

Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

2012

FPGA Implementation of SRAM-based Ternary Content Addressable Memory.

Zahid Ullah, Manish Kumar Jaiswal, Y. C. Chan, Ray C. C. Cheung

Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium Workshops & PhD Forum, 2012