Yves Blaquière
Orcid: 0000-0001-6204-7427
According to our database1,
Yves Blaquière
authored at least 58 papers
between 1990 and 2024.
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Bibliography
2024
Configurable and Intelligent Switched CMOS Current Driver Powering Arrays of Electrothermal Actuators for MEMS Switches.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
2023
An Efficient OpenCL-Based Implementation of a SHA-3 Co-Processor on an FPGA-Centric Platform.
IEEE Trans. Circuits Syst. II Express Briefs, March, 2023
Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023
Toward 2.5D Structures for Multi-Channel MEMS Acoustic-Based Digital Isolators using Through Silicon Openings.
Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023
2022
A MEMS Electrothermal Actuator Designed for a DC Switch Aimed at Power Switching Applications and High Voltage Resilience.
Proceedings of the 20th IEEE Interregional NEWCAS Conference, 2022
A 3.3 V 0.1-1 A Hybrid Buck-Boost Converter with 85-97 % Power Efficiency Range Highly-Suited for Battery-Powered Devices using Low-Profile High-DCR Inductor.
Proceedings of the 20th IEEE Interregional NEWCAS Conference, 2022
Multi-Phase Hybrid Boost Converter with High Conduction Loss Reduction and Fast Dynamic Response for Automotive Applications.
Proceedings of the 20th IEEE Interregional NEWCAS Conference, 2022
A Reconfigurable Power System-in-Package Module using GaN HEMTs and IC Bare Dies on LTCC Substrate: Design - Implementation - Experiment and Future Directions.
Proceedings of the 20th IEEE Interregional NEWCAS Conference, 2022
2021
Ring-Oscillator-Based High Accuracy Low Complexity Multichannel Time-to-Digital Converter Architecture for Field-Programmable Gate Arrays.
IEEE Trans. Instrum. Meas., 2021
A Versatile 200-V Capacitor-Coupled Level Shifter for Fully Floating Multi-MHz Gate Drivers.
IEEE Trans. Circuits Syst. II Express Briefs, 2021
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Compact and Low-Power Under-Voltage Lockout and Thermal-Shutdown Protection Circuits Using a Novel Low-Iq All-in-One Bandgap Comparator.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
A Novel Minimum-Phase Dual-Inductor Hybrid Boost Converter with PWM Voltage-Mode Controller.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Acceleration of the Secure Hash Algorithm-256 (SHA-256) on an FPGA-CPU Cluster Using OpenCL.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
2020
Fine resolution delay tuning method to improve the linearity of an unbalanced time-to-digital converter on a Xilinx FPGA.
IET Circuits Devices Syst., 2020
A High Voltage Multi-Purpose On-the-fly Reconfigurable Half-Bridge Gate Driver for GaN HEMTs in 0.18-μm HV SOI CMOS Technology.
Proceedings of the 18th IEEE International New Circuits and Systems Conference, 2020
2019
IEEE Trans. Very Large Scale Integr. Syst., 2019
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
2018
A pattern-based routing algorithm for a novel electronic system prototyping platform.
Integr., 2018
Diagnosis algorithms for a reconfigurable and defect tolerant JTAG scan chain in large area integrated circuits.
Integr., 2018
2017
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
2016
An Asynchronous Delta-Modulator Based A/D Converter for an Electronic System Prototyping Platform.
IEEE Trans. Circuits Syst. I Regul. Pap., 2016
Microelectron. Reliab., 2016
A novel spatially configurable differential interface for an electronic system prototyping platform.
Integr., 2016
A compact spatially configurable differential input stage for a field programmable interconnection network.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
2015
An Interface for Open-Drain Bidirectional Communication in Field Programmable Interconnection Networks.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015
Circuit Level Modeling of Extra Combinational Delays in SRAM FPGAs Due to Transient Ionizing Radiation.
CoRR, 2015
Proceedings of the 21st IEEE International On-Line Testing Symposium, 2015
Defect diagnosis algorithms for a field programmable interconnect network embedded in a Very Large Area Integrated Circuit.
Proceedings of the 21st IEEE International On-Line Testing Symposium, 2015
Proceedings of the 2015 IEEE East-West Design & Test Symposium, 2015
2014
IEEE Trans. Circuits Syst. I Regul. Pap., 2014
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
2013
IEEE Trans. Very Large Scale Integr. Syst., 2013
Proceedings of the IEEE 11th International New Circuits and Systems Conference, 2013
A configurable analog buffer dedicated to a wafer-scale prototyping platform of electronic systems.
Proceedings of the 4th IEEE Latin American Symposium on Circuits and Systems, 2013
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
Proceedings of the 26th IEEE Canadian Conference on Electrical and Computer Engineering CCECE 2013, 2013
2012
A new approach for pin detection for an electronic system prototyping reconfigurable platform.
Proceedings of the 23rd IEEE International Symposium on Rapid System Prototyping, 2012
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012
Propagating analog signals through a fully digital network on an electronic system prototyping platform.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
2011
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
A large range and fine tuning configurable Bandgap reference dedicated to wafer-scale systems.
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011
2010
A spatially reconfigurable fast differential interface for a wafer scale configurable platform.
Proceedings of the 17th IEEE International Conference on Electronics, 2010
Proceedings of the 17th IEEE International Conference on Electronics, 2010
2009
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
2008
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008
Hardware/software system co-verification of an active reconfigurable board with SystemC-VHDL.
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008
2007
Digital Measurement Technique for Capacitance Variation Detection on Integrated Circuit I/Os.
Proceedings of the 14th IEEE International Conference on Electronics, 2007
2000
Analysis of quantization effects in a digital hardware implementation of a fuzzy ART neural network algorithm.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000
1998
A Comparative Analysis of Fuzzy ART Neural Network Implementations: The Advantages of Reconfigurable Computing.
Proceedings of the 6th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '98), 1998
1996
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996
1995
Proceedings of the 1995 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 1995
1990
Microprocess. Microsystems, 1990