Yves Audet
Orcid: 0000-0002-2581-4479
According to our database1,
Yves Audet
authored at least 33 papers
between 1997 and 2024.
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Bibliography
2024
A Low-Power 0.68-Gbps Data Communication System for Capacitive Digital Isolator With 1.9-ns Propagation Delay.
IEEE Trans. Very Large Scale Integr. Syst., May, 2024
A 32-mV Supply Ring Oscillator Composed of Modified Schmitt Trigger Delay Cells for Integrated Start-Up Circuits in DC Energy Harvesting Systems.
IEEE Access, 2024
IEEE Access, 2024
Capacitively Isolated 400 Mbps Data Transfer System with 2 Ns Propagation Delay and 5 kV /µs Common Mode Transient Immunity.
Proceedings of the 22nd IEEE Interregional NEWCAS Conference, 2024
2023
A Wide-Range Low-Power Thyristor-Based Delay Element With Improved Temperature Sensitivity.
IEEE Trans. Circuits Syst. II Express Briefs, July, 2023
A Low-Offset VCO-Based Time-Domain Comparator Using a Phase Frequency Detector With Reduced Dead and Blind Zones.
IEEE Trans. Circuits Syst. I Regul. Pap., March, 2023
2022
A Fully Integrated Low-Power Hall-Based Isolation Amplifier With IMR Greater Than 120 dB.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
A Low-Phase-Noise CMOS Ring Voltage-Controlled Oscillator Intended for Time-Based Sensor Interfaces.
IEEE Access, 2022
A Versatile SoC/SiP Sensor Interface for Industrial Applications: Implementation Challenges.
IEEE Access, 2022
2021
IEEE Trans. Circuits Syst. I Regul. Pap., 2021
A High Speed Fully Integrated Capacitive Digital Isolation System in 0.35 µm CMOS for Industrial Sensor Interfaces.
Proceedings of the 19th IEEE International New Circuits and Systems Conference, 2021
2020
Proceedings of the 18th IEEE International New Circuits and Systems Conference, 2020
Proceedings of the 18th IEEE International New Circuits and Systems Conference, 2020
A Fully Integrated On-Chip Inductive Digital Isolator: Design Investigation and Simulation.
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020
Wide Dynamic Range Front-End Programmable Isolation Amplifier using Integrated CMOS Hall Effect Sensor.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
2018
2016
Differential integrator pixel architecture for dark current compensation in CMOS image sensors.
Proceedings of the 14th IEEE International New Circuits and Systems Conference, 2016
2015
Circuit Level Modeling of Extra Combinational Delays in SRAM FPGAs Due to Transient Ionizing Radiation.
CoRR, 2015
2014
On Delay Faults Affecting I/O Blocks of an SRAM-Based FPGA Due to Ionizing Radiations.
CoRR, 2014
Multi-abstraction level signature generation and comparison based on radiation single event upset.
Proceedings of the 2014 IEEE 20th International On-Line Testing Symposium, 2014
2013
A Library-Based Early Soft Error Sensitivity Analysis Technique for SRAM-Based FPGA Design.
J. Electron. Test., 2013
2012
Proceedings of the 10th IEEE International NEWCAS Conference, 2012
2011
IEEE Trans. Circuits Syst. II Express Briefs, 2011
2008
IEEE Trans. Educ., 2008
2007
IEEE Trans. Circuits Syst. I Regul. Pap., 2007
Integrated Circuit Trimming Technique for Offset Reduction in a Precision CMOS Amplifier.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
2004
IEEE Des. Test Comput., 2004
Low voltage current reference with temperature and process variation compensation.
Proceedings of the Second IASTED International Conference on Circuits, 2004
Characteristics of Fault-Tolerant Photodiode and Photogate Active Pixel Sensor (APS).
Proceedings of the 19th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2004), 2004
2003
Implementation and Testing of Fault-Tolerant Photodiode-Based Active Pixel Sensor (APS).
Proceedings of the 18th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2003), 2003
2001
Proceedings of the 16th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2001), 2001
1999
Proceedings of the 14th International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT '99), 1999
1997
Yield improvement of a large area magnetic field sensor array using redundancy schemes.
IEEE Trans. Very Large Scale Integr. Syst., 1997