Yuye Kang
According to our database1,
Yuye Kang
authored at least 11 papers
between 2022 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2024
Unveiling the Impact of AC PBTI on Hydrogen Formation in Oxide Semiconductor Transistors.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024
Fluorine Plasma Treatment-Enabled ITO Transistors: Excellent Reliability and Comprehensive Understanding of Temperature Dependence from 77K to 375K.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024
2023
Grain Size Reduction of Ferroelectric HZO Enabled by a Novel Solid Phase Epitaxy (SPE) Approach: Working Principle, Experimental Demonstration, and Theoretical Understanding.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
First Demonstration of BEOL-Compatible MFMIS Fe-FETs with 3D Multi-Fin Floating Gate: In-situ ALD-deposited MFM, LCH of 50 nm, > 2×10<sup>9</sup> Endurance, and 58.3% Area Saving.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
Thickness-Engineered Extremely-thin Channel High Performance ITO TFTs with Raised S/D Architecture: Record-Low RSD, Highest Moblity (Sub-4 nm TCH Regime), and High VTH Tunability.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
First Demonstration of BEOL-Compatible Write-Enhanced Ferroelectric-Modulated Diode (FMD): New Possibility for Oxide Semiconductor Memory Devices.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
Novel Bridge Transmission Line Method for Thin-Film Semiconductors: Modelling, Simulation Verification, and Experimental Demonstration.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
2022
Experimental Demonstration of An Inversion-Type Ferroelectric Capacitive Memory and its 1 kbit Crossbar Array Featuring High CHCS/CLCS, Fast Speed, and Long Retention.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
Extremely Scaled Bottom Gate a-IGZO Transistors Using a Novel Patterning Technique Achieving Record High Gm of 479.5 μS/μm (VDS of 1 V) and fT of 18.3 GHz (VDS of 3 V).
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
BEOL-compatible Ta/HZO/W Ferroelectric Tunnel Junction with Low Operating Voltage Targeting for Low Power Application.
Proceedings of the International Conference on IC Design and Technology, 2022