Yuya Omori

Orcid: 0000-0001-7505-6306

According to our database1, Yuya Omori authored at least 14 papers between 2018 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
An Efficient Reference Image Sharing Method for the Image-Division Parallel Video Encoding Architecture.
IEICE Trans. Electron., June, 2023

A Low-Latency 4K HEVC Multi-Channel Encoding System with Content-Aware Bitrate Control for Live Streaming.
IEICE Trans. Inf. Syst., 2023

High-definition technology of AI inference scheme for object detection on edge/terminal.
IEICE Electron. Express, 2023

2022
A Partitioned Memory Architecture with Prefetching for Efficient Video Encoders.
Proceedings of the Parallel and Distributed Computing, Applications and Technologies, 2022

OpenCL-Based Design of an FPGA Accelerator for H.266/VVC Transform and Quantization.
Proceedings of the 65th IEEE International Midwest Symposium on Circuits and Systems, 2022

An Efficient Reference Image Sharing Method for the Parallel Video Encoding Architecture.
Proceedings of the IEEE Symposium in Low-Power and High-Speed Chips, 2022

2021
High-definition object detection technology based on AI inference scheme and its implementation.
IEICE Electron. Express, 2021

2020
Low Delay 4K 120fps HEVC Decoder with Parallel Processing Architecture.
IEICE Trans. Electron., 2020

2019
UTC-PD-Integrated HEMT for Optical-to-Millimeter-Wave Carrier Frequency Down-Conversion.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2019

A Low Power Motion Estimation Engine with Adaptive Bit-Shifted SAD Calculation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

4K 120fps HEVC Temporal Scalable Encoder with Super Low Delay.
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019

A Real-Time 4K HEVC Multi-Channel Encoding System with Content-Aware Bitrate Control.
Proceedings of the 2019 IEEE Global Communications Conference, 2019

Low Delay 4K 120fps HEVC Decoder with Parallel Processing Architecture.
Proceedings of the IEEE Symposium in Low-Power and High-Speed Chips, 2019

2018
A 120 fps High Frame Rate Real-time HEVC Video Encoder with Parallel Configuration Scalable to 4K.
IEEE Trans. Multi Scale Comput. Syst., 2018


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