Yuya Mukuda
According to our database1,
Yuya Mukuda
authored at least 2 papers
in 2007.
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Bibliography
2007
A 2-stage-pipelined 16 port SRAM with 590Gbps random access bandwidth and large noise margin.
IEICE Electron. Express, 2007
A 0.6-Tbps, 16-port SRAM design with 2-stage- pipeline and multi-stage-sensing scheme.
Proceedings of the 33rd European Solid-State Circuits Conference, 2007