Yuxiang Huan
Orcid: 0000-0002-9155-1451
According to our database1,
Yuxiang Huan
authored at least 40 papers
between 2015 and 2024.
Collaborative distances:
Collaborative distances:
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Bibliography
2024
Communication-Aware and Resource-Efficient NoC-Based Architecture for CNN Acceleration.
IEEE J. Emerg. Sel. Topics Circuits Syst., September, 2024
IEEE Internet Things J., 2024
2023
ASLog: An Area-Efficient CNN Accelerator for Per-Channel Logarithmic Post-Training Quantization.
IEEE Trans. Circuits Syst. I Regul. Pap., December, 2023
A Low-Power Hybrid-Precision Neuromorphic Processor With INT8 Inference and INT16 Online Learning in 40-nm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap., October, 2023
IEEE Trans. Ind. Informatics, April, 2023
2022
IEEE Trans. Ind. Informatics, 2022
IEEE Trans. Circuits Syst. II Express Briefs, 2022
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
A Neuromorphic Processing System With Spike-Driven SNN Processor for Wearable ECG Classification.
IEEE Trans. Biomed. Circuits Syst., 2022
A Design of Smart Unmanned Vending Machine for New Retail Based on Binocular Camera and Machine Vision.
IEEE Consumer Electron. Mag., 2022
2021
A Memory-Efficient CNN Accelerator Using Segmented Logarithmic Quantization and Multi-Cluster Architecture.
IEEE Trans. Circuits Syst. II Express Briefs, 2021
IECA: An In-Execution Configuration CNN Accelerator With 30.55 GOPS/mm² Area Efficiency.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021
Microelectron. J., 2021
Future Gener. Comput. Syst., 2021
Proceedings of the IEEE Biomedical Circuits and Systems Conference, BioCAS 2021, 2021
Proceedings of the 3rd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2021
An Ultra-Low Latency Multicast Router for Large-Scale Multi-Chip Neuromorphic Processing.
Proceedings of the 3rd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2021
2020
Base-Reconfigurable Segmented Logarithmic Quantization and Hardware Design for Deep Neural Networks.
J. Signal Process. Syst., 2020
A Smart Dental Health-IoT Platform Based on Intelligent Hardware, Deep Learning, and Mobile Terminal.
IEEE J. Biomed. Health Informatics, 2020
An Autonomous Error-Tolerant Architecture Featuring Self-reparation for Convolutional Neural Networks.
Proceedings of the 91st IEEE Vehicular Technology Conference, 2020
Proceedings of the 33rd IEEE International System-on-Chip Conference, 2020
2019
Automated trading systems statistical and machine learning methods and hardware implementation: a survey.
Enterp. Inf. Syst., 2019
Energy-Aware Workload Allocation for Distributed Deep Neural Networks in Edge-Cloud Continuum.
Proceedings of the 32nd IEEE International System-on-Chip Conference, 2019
Proceedings of the IEEE International Conference on Artificial Intelligence Circuits and Systems, 2019
2018
A Design of Autonomous Error-Tolerant Architectures for Massively Parallel Computing.
IEEE Trans. Very Large Scale Integr. Syst., 2018
IEEE Access, 2018
IEEE Access, 2018
A Low-Power Arithmetic Element for Multi-Base Logarithmic Computation on Deep Neural Networks.
Proceedings of the 31st IEEE International System-on-Chip Conference, 2018
An ASIC Design of Multi-Electrode Digital Basket Catheter Systems with Reconfigurable Compressed Sampling.
Proceedings of the 31st IEEE International System-on-Chip Conference, 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
2017
CoRR, 2017
Proceedings of the 14th IEEE Annual Consumer Communications & Networking Conference, 2017
2016
A 101.4 GOPS/W Reconfigurable and Scalable Control-Centric Embedded Processor for Domain-Specific Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2016
A multiplication reduction technique with near-zero approximation for embedded learning in IoT devices.
Proceedings of the 29th IEEE International System-on-Chip Conference, 2016
Proceedings of the IEEE International Conference on RFID Technology and Applications, 2016
Hierarchical design of a low power standing wave oscillator based clock distribution network.
Proceedings of the IEEE Nordic Circuits and Systems Conference, 2016
A 101.4 GOPS/W reconfigurable and scalable control-centric embedded processor for domain-specific applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
2015
A 61 μA/MHz reconfigurable application-specific processor and system-on-chip for Internet-of-Things.
Proceedings of the 28th IEEE International System-on-Chip Conference, 2015
A Smart Catheter System for Minimally Invasive Brain Monitoring.
Proceedings of the BIODEVICES 2015, 2015