Yuu Watanabe

According to our database, Yuu Watanabe authored at least 7 papers between 1988 and 2017.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2017

Session 7 overview: Wireless transceivers.

Yuu Watanabe, Danielle Griffith, Aarno Pärssinen

Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

2016

Session 13 overview: Wireless systems.

Yuu Watanabe, Pierre Busson

Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

2006

An 18mW 90 to 770MHz synthesizer with agile auto-tuning for digital TV-tuners.

Masazumi Marutani, Hideaki Anbutsu, Masafumi Kondo, Noriaki Shirai, Hiroshi Yamazaki, Yuu Watanabe

Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

2004

Intelligent Agent to Support Design in Supply Chain Based on Semantic Web Services.

Incheon Paik, Shinjirou Takami, Yuu Watanabe

Proceedings of the 4th International Conference on Hybrid Intelligent Systems (HIS 2004), 2004

2002

A 54-GHz distributed amplifier with 6-V_PP output for a 40-Gb/s LiNbO₃ modulator driver.

Hisao Shigematsu, Masaru Sato, Tatsuya Hirose, Yuu Watanabe

IEEE J. Solid State Circuits, 2002

A 43-Gb/s full-rate-clock 4: 1 multiplexer in InP-based HEMT technology.

Yasuhiro Nakasha, Toshihide Suzuki, Hideki Kano, Kouji Tsukashima, Akio Ohya, Ken Sawada, Kozo Makiyama, Tsuyoshi Takahashi, Masahiro Nishi, Tatsuya Hirose, Masahiko Takikawa, Yuu Watanabe

IEEE J. Solid State Circuits, 2002

1988

A 40-ps high electron mobility transistor 4.1 K gate array.

Kiyoshi Kajii, Yuu Watanabe, Masahisa Suzuki, Isamu Hanyu, Makoto Kosugi, Kouichiro Odani, Takashi Mimura, Masayuki Abe

IEEE J. Solid State Circuits, April, 1988