Yuting Chen
Affiliations:- University of California, Computer Science Department, Los Angeles, CA, USA
According to our database1,
Yuting Chen
authored at least 14 papers
between 2011 and 2016.
Collaborative distances:
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Timeline
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Bibliography
2016
Memory System Optimizations for Customized Computing - From Single-Chip to Datacenter.
PhD thesis, 2016
ARAPrototyper: Enabling Rapid Prototyping and Evaluation for Accelerator-Rich Architectures.
CoRR, 2016
A High-throughput Architecture for Lossless Decompression on FPGA Designed Using HLS (Abstract Only).
Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2016
ARAPrototyper: Enabling Rapid Prototyping and Evaluation for Accelerator-Rich Architecture (Abstact Only).
Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2016
When Spark Meets FPGAs: A Case Study for Next-Generation DNA Sequencing Acceleration.
Proceedings of the 24th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2016
Proceedings of the 24th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2016
2015
Synthesis Lectures on Computer Architecture, Morgan & Claypool Publishers, ISBN: 978-3-031-01748-3, 2015
ARACompiler: a prototyping flow and evaluation framework for accelerator-rich architectures.
Proceedings of the 2015 IEEE International Symposium on Performance Analysis of Systems and Software, 2015
Interconnect synthesis of heterogeneous accelerators in a shared memory architecture.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2015
Proceedings of the 23rd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2015
2013
Proceedings of the 2013 IEEE 31st International Conference on Computer Design, 2013
2012
Proceedings of the International Symposium on Low Power Electronics and Design, 2012
Dynamically reconfigurable hybrid cache: An energy-efficient last-level cache design.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
2011
HC-Sim: a fast and exact l1 cache simulator with scratchpad memory co-simulation support.
Proceedings of the 9th International Conference on Hardware/Software Codesign and System Synthesis, 2011