Yutaka Yamada

According to our database, Yutaka Yamada authored at least 16 papers between 2004 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of two.

2022

Trend Prediction of Students' Mock Examination Results Using Matrix Completion.

Yutaka Yamada, Keisuke Maeda, Takahiro Ogawa, Miki Haseyama

Proceedings of the 11th IEEE Global Conference on Consumer Electronics, 2022

2020

A 20.5 TOPS Multicore SoC With DNN Accelerator and Image Signal Processor for Automotive Applications.

Yutaka Yamada, Masato Uchiyama, Masashi Jobashi, Tomohiro Koizumi, Takanori Tamai, Nobuhiro Sato, Jun Tanabe, Katsuyuki Kimura, Yoshinari Ojima, Ryusuke Murakami, Takashi Yoshikawa, Toru Sano, Yasuki Tanabe, Yutaro Ishigaki, Soichiro Hosoda, Fumihiko Hyuga, Akira Moriya, Ryuji Hada, Atsushi Masuda

IEEE J. Solid State Circuits, 2020

2019

A 20.5TOPS and 217.3GOPS/mm² Multicore SoC with DNN Accelerator and Image Signal Processor Complying with ISO26262 for Automotive Applications.

Yutaka Yamada, Toru Sano, Yasuki Tanabe, Yutaro Ishigaki, Soichiro Hosoda, Fumihiko Hyuga, Akira Moriya, Ryuji Hada, Atsushi Masuda, Masato Uchiyama, Tomohiro Koizumi, Takanori Tamai, Nobuhiro Sato, Jun Tanabe, Katsuyuki Kimura, Ryusuke Murakami, Takashi Yoshikawa

Proceedings of the IEEE International Solid- State Circuits Conference, 2019

Performance Prediction Method of Examinees Based on Matrix Completion.

Yutaka Yamada, Takahiro Ogawa, Miki Haseyama

Proceedings of the IEEE 8th Global Conference on Consumer Electronics, 2019

2015

18.2 A 1.9TOPS and 564GOPS/W heterogeneous multicore SoC with color-based object classification accelerator for image-recognition applications.

Jun Tanabe, Toru Sano, Yutaka Yamada, Tomoki Watanabe, Mayu Okumura, Manabu Nishiyama, Tadakazu Nomura, Kazushige Oma, Nobuhiro Sato, Moriyasu Banno, Hiroo Hayashi, Takashi Miyamori

Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

2011

Virtual Screening for Ligands of the Insect Molting Hormone Receptor.

Toshiyuki Harada, Yoshiaki Nakagawa, Takehiko Ogura, Yutaka Yamada, Takehiro Ohe, Hisashi Miyagawa

J. Chem. Inf. Model., 2011

FlexGrip™: A small and high-performance programmable hardware for highly sequential application.

Takashi Yoshikawa, Fumihiko Hyuga, Masayuki Tokunaga, Yutaka Yamada, Shigehiro Asano

Proceedings of the 2011 IEEE Symposium on Low-Power and High-Speed Chips, 2011

2009

Fat H-Tree: A Cost-Efficient Tree-Based On-Chip Network.

Hiroki Matsutani, Michihiro Koibuchi, Yutaka Yamada, D. Frank Hsu, Hideharu Amano

IEEE Trans. Parallel Distributed Syst., 2009

2006

A Simple Data Transfer Technique Using Local Address for Networks-on-Chips.

Michihiro Koibuchi, Kenichiro Anjo, Yutaka Yamada, Akiya Jouraku, Hideharu Amano

IEEE Trans. Parallel Distributed Syst., 2006

An implementation of hardware accelerator using dynamically reconfigurable architecture.

Takashi Yoshikawa, Yutaka Yamada, Shigehiro Asano

Proceedings of the 2006 IEEE Hot Chips 18 Symposium (HCS), 2006

2005

Evaluation of vibration in many positions by SOM.

Nobuaki Kamimoto, Yutaka Yamada, Masami Kitamura, Kiyoshi Nishikawa

Artif. Life Robotics, 2005

Non-Minimal Routing Strategy for Application-Specific Networks-on-Chips.

Hiroki Matsutani, Michihiro Koibuchi, Yutaka Yamada, Akiya Jouraku, Hideharu Amano

Proceedings of the 34th International Conference on Parallel Processing Workshops (ICPP 2005 Workshops), 2005

2004

BLACK-BUS: A New Data-Transfer Technique Using Local Address on Networks-on-Chips.

Kenichiro Anjo, Yutaka Yamada, Michihiro Koibuchi, Akiya Jouraku, Hideharu Amano

Proceedings of the 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), 2004

Stream applications on the dynamically reconfigurable processor.

Masayasu Suzuki, Yohei Hasegawa, Yutaka Yamada, Naoto Kaneko, Katsuaki Deguchi, Hideharu Amano, Kenichiro Anjo, Masato Motomura, Kazutoshi Wakabayashi, Takao Toi, Toru Awashima

Proceedings of the 2004 IEEE International Conference on Field-Programmable Technology, 2004

Implementing and Evaluating Stream Applications on the Dynamically Reconfigurable Processor.

Noriaki Suzuki, Shunsuke Kurotaki, Masayasu Suzuki, Naoto Kaneko, Yutaka Yamada, Katsuaki Deguchi, Yohei Hasegawa, Hideharu Amano, Kenichiro Anjo, Masato Motomura, Kazutoshi Wakabayashi, Takeo Toi, Toru Awashima

Proceedings of the 12th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2004), 2004

Folded Fat H-Tree: An Interconnection Topology for Dynamically Reconfigurable Processor Array.

Yutaka Yamada, Hideharu Amano, Michihiro Koibuchi, Akiya Jouraku, Kenichiro Anjo, Katsunobu Nishimura

Proceedings of the Embedded and Ubiquitous Computing, 2004