Yuta Toriyama

According to our database, Yuta Toriyama authored at least 6 papers between 2011 and 2018.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2018

A 2.267-Gb/s, 93.7-pJ/bit Non-Binary LDPC Decoder With Logarithmic Quantization and Dual-Decoding Algorithm Scheme for Storage Applications.

Yuta Toriyama, Dejan Markovic

IEEE J. Solid State Circuits, 2018

2016

High-Performance and Energy-Efficient Decoder Design for Non-Binary LDPC Codes.

Yuta Toriyama

PhD thesis, 2016

2014

Logarithmic quantization scheme for reduced hardware cost and improved error floor in non-binary LDPC decoders.

Yuta Toriyama, Behzad Amiri, Lara Dolecek, Dejan Markovic

Proceedings of the IEEE Global Communications Conference, 2014

Field-order based hardware cost analysis of non-binary LDPC decoders.

Yuta Toriyama, Behzad Amiri, Lara Dolecek, Dejan Markovic

Proceedings of the 48th Asilomar Conference on Signals, Systems and Computers, 2014

2012

A body-voltage-sensing-based short pulse reading circuit for spin-torque transfer RAMs (STT-RAMs).

Fengbo Ren, Henry Park, Richard Dorrance, Yuta Toriyama, Chih-Kong Ken Yang, Dejan Markovic

Proceedings of the Thirteenth International Symposium on Quality Electronic Design, 2012

2011

Scalability and design-space analysis of a 1T-1MTJ memory cell.

Richard Dorrance, Fengbo Ren, Yuta Toriyama, Amr Amin Hafez, Chih-Kong Ken Yang, Dejan Markovic

Proceedings of the 2011 IEEE/ACM International Symposium on Nanoscale Architectures, 2011