Yusuke Okaniwa

According to our database, Yusuke Okaniwa authored at least 3 papers between 2005 and 2007.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2007

A 40-44 Gb/s 3 × Oversampling CMOS CDR/1: 16 DEMUX.

Nikola Nedovic, Nestoras Tzartzanis, Hirotaka Tamura, Francis M. Rotella, Magnus Wiklund, Yuma Mizutani, Yusuke Okaniwa, Tadahiro Kuroda, Junji Ogawa, William W. Walker

IEEE J. Solid State Circuits, 2007

A 40-to-44Gb/s 3�? Oversampling CMOS CDR/1: 16 DEMUX.

Nikola Nedovic, Nestoras Tzartzanis, Hirotaka Tamura, Francis M. Rotella, Magnus Wiklund, Yuma Mizutani, Yusuke Okaniwa, Tadahiro Kuroda, Junji Ogawa, William W. Walker

Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

2005

A 40-Gb/s CMOS clocked comparator with bandwidth modulation technique.

Yusuke Okaniwa, Hirotaka Tamura, Masaya Kibune, Daisuke Yamazaki, Tsz-Shing Cheung, Junji Ogawa, Nestoras Tzartzanis, William W. Walker, Tadahiro Kuroda

IEEE J. Solid State Circuits, 2005