Yuriy Shiyanovskii

According to our database1, Yuriy Shiyanovskii authored at least 11 papers between 2008 and 2013.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2013
Analytical modeling and numerical simulations of temperature field in TSV-based 3D ICs.
Proceedings of the International Symposium on Quality Electronic Design, 2013

Knowledge-Guided Methodology for Specification Analysis.
Proceedings of the 25th IEEE International Conference on Tools with Artificial Intelligence, 2013

2012
A low power memory cell design for SEU protection against radiation effects.
Proceedings of the 2012 NASA/ESA Conference on Adaptive Hardware and Systems, 2012

2011
A novel radiation tolerant SRAM design based on synergetic functional component separation for nanoscale CMOS.
Proceedings of the 17th IEEE International On-Line Testing Symposium (IOLTS 2011), 2011

Noise margin, critical charge and power-delay tradeoffs for SRAM design.
Proceedings of the 17th IEEE International On-Line Testing Symposium (IOLTS 2011), 2011

2010
Process reliability based trojans through NBTI and HCI effects.
Proceedings of the 2010 NASA/ESA Conference on Adaptive Hardware and Systems, 2010

2009
Exploiting Semiconductor Properties for Hardware Trojans
CoRR, 2009

Hardware Trojan by Hot Carrier Injection
CoRR, 2009

SRAM cell design using tri-state devices for SEU protection.
Proceedings of the 15th IEEE International On-Line Testing Symposium (IOLTS 2009), 2009

An Adaptable Task Manager for Reconfigurable Architecture Kernels.
Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems, 2009

2008
SRAM Cell Design Protected from SEU Upsets.
Proceedings of the 14th IEEE International On-Line Testing Symposium (IOLTS 2008), 2008


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