Yuri Yasuda-Masuoka

According to our database, Yuri Yasuda-Masuoka authored at least 3 papers between 2023 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

Product Performance Aware 3^rd Generation GAA Platform Transistor Design with Extreme Small Local Layout Effect and Transistor Variation.

Dongchan Jeong, Seungkwon Kim, Seulki Park, Sanghyeon Lee, Sada-Aki Masuoka, Byungha Choi, Shincheol Min, Sanghoon Lee, Minseong Lee, Chang-Woo Sohn, Jaehun Jeong, Yuri Yasuda-Masuoka, Ja-Hum Ku

Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

2023

Highly Reliable/Manufacturable 4nm FinFET Platform Technology (SF4X) for HPC Application with Dual-CPP/HP-HD Standard Cells.

Kihwang Son, Seulki Park, Kyunghoon Jung, Jun-Gyu Kim, Younggun Ko, Keonyong Cheon, Changkeun Yoon, Jiho Kim, Jaehun Jeong, Taehun Myung, Changmin Hong, Weonwi Jang, Min-Chul Sun, Sungil Jo, Ju-Youn Kim, Byungmoo Song, Yuri Yasuda-Masuoka, Ja-Hum Ku, Gitae Jeong

Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

World's First GAA 3nm Foundry platform Technology (SF3) with Novel Multi-Bridge-Channel-FET (MBCFET™) Process.

Jaehun Jeong, Sanghyeon Lee, Sada-Aki Masuoka, Shincheol Min, Sanghoon Lee, Seungkwon Kim, Taehun Myung, Byungha Choi, Chang-Woo Sohn, Sung Won Kim, Jeongmin Choi, Jungmin Park, Hyungjong Lee, Taeyoung Kim, Seokhoon Kim, Yuri Yasuda-Masuoka, Ja-Hum Ku, Gitae Jeong

Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023