Yuri Terada
According to our database1,
Yuri Terada
authored at least 6 papers
between 2015 and 2021.
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Bibliography
2021
A 128Gb 1-bit/Cell 96-Word-Line-Layer 3D Flash Memory to Improve the Random Read Latency With tProg = 75 μs and tR = 4 μs.
IEEE J. Solid State Circuits, 2021
2020
13.5 A 128Gb 1b/Cell 96-Word-Line-Layer 3D Flash Memory to Improve Random Read Latency with tPROG=75µs and tR=4µs.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020
2018
Mechanism allowing large-force application by a mobile robot, and development of ARODA.
Robotics Auton. Syst., 2018
2016
IEEE J. Solid State Circuits, 2016
Proceedings of the Intelligent Autonomous Systems 14, 2016
2015
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015