Yuri Rogdestvenski

This page is a disambiguation page, it actually contains mutiple papers from persons of the same or a similar name.

Bibliography

2022

Approximate Evaluation of the Efficiency of Synchronous and Self-Timed Methodologies in Problems of Designing Failure-Tolerant Computing and Control Systems.

[BibT_eX]

[DOI]

Autom. Remote. Control., 2022

2021

Self-Timed Storage Register Soft Error Tolerance Improvement.

[BibT_eX]

[DOI]

Proceedings of the IEEE East-West Design & Test Symposium, 2021

2020

Increasing Self-Timed Circuit Soft Error Tolerance.

[BibT_eX]

[DOI]

Proceedings of the IEEE East-West Design & Test Symposium, 2020

Improvement of the Quasi Delay-Insensitive Pipeline Noise Immunity.

[BibT_eX]

[DOI]

Proceedings of the 11th IEEE International Conference on Dependable Systems, 2020

2019

Advanced Indication of the Self-Timed Circuits.

[BibT_eX]

[DOI]

Proceedings of the 2019 IEEE East-West Design & Test Symposium, 2019

Fault-Tolerance of Self-Timed Circuits.

[BibT_eX]

[DOI]

Proceedings of the 10th International Conference on Dependable Systems, 2019

2016

Speed-independent fused multiply add and subtract unit.

[BibT_eX]

[DOI]

Proceedings of the 2016 IEEE East-West Design & Test Symposium, 2016

2015

Speed-independent floating point coprocessor.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE East-West Design & Test Symposium, 2015

2009

Quasi-Delay-Insensitive Computing Device: Methodological Aspects and Practical Implementation.

[BibT_eX]

[DOI]

Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2009

Yuri Rogdestvenski

Bibliography

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